KS57C2308/P2308/C2316/P2316MEMORY MAP

SMOD — Serial I/O Mode Register

FE1H, FE0H

Bit

Identifier

RESET Value

Read/Write

Bit Addressing

7

6

5

4

3

2

1

0

.7

.6

.5

"0"

.3

.2

.1

.0

 

 

 

 

 

 

 

 

0

0

0

0

0

0

0

0

W

W

W

W

R/W

W

W

W

8

8

8

8

1/8

8

8

8

.7–.5

Serial I/O Clock Selection and SBUF R/W Status Control Bits

 

0

0

0

Use an external clock at the SCK pin;

 

 

 

 

Enable SBUF when SIO operation is halted or when SCK goes high

 

0

0

1

Use the TOL0 clock from timer/counter 0;

 

 

 

 

Enable SBUF when SIO operation is halted or when SCK goes high

 

0

1

x

Use the selected CPU clock (fxx/4, 8, or 64; “fxx” is the system

 

 

 

 

clock); Enable SBUF read/write operation. “x” means “don't care”.

 

1

0

0

4.09 kHz clock (fxx/210)

 

1

1

1

262 kHz clock (fxx/24); Note: You cannot select a fxx/24 clock

 

 

 

 

frequency if you have selected a CPU clock of fxx/64

 

NOTE: All kHz frequency ratings assume a system clock of 4.19MHz

.4

Bit 4

 

0

Always logic zero

 

 

 

.3

Initiate Serial I/O Operation Bit

1

Clear IRQS flag and 3-bit clock counter to logic zero; then initiate serial transmission. When SIO transmission starts, this bit is cleared by hardware to logic zero

.2

Enable/Disable SIO Data Shifter and Clock Counter Bit

0Disable the data shifter and clock counter; the contents of IRQS flag is retained when serial transmission is completed

1Enable the data shifter and clock counter; The IRQS flag is set to logic one when serial transmission is completed

.1

Serial I/O Transmission Mode Selection Bit

0Receive-only mode; output buffer is off

1Transmit-and-receive mode; output buffer is on

.0

LSB/MSB Transmission Mode Selection Bit

0Transmit the most significant bit (MSB) first

1Transmit the least significant bit (LSB) first

4-27

Page 69
Image 69
Samsung KS57C2308 manual Smod Serial I/O Mode Register, FE1H, FE0H