Samsung KS57C2308 manual Nop, Instruction Operation Description and Guidelines

SAM47 INSTRUCTION SET KS57C2308/P2308/C2316/P2316

LD — Load

LD(Continued)

Examples: 2. If an instruction such as LD A,#im (LD EA,#imm) or LD HL,#imm is written more than two times in succession, only the first LD is executed; the next instructions are treated as NOPs. Here are two examples of this “redundancy effect”:

LD	A,#1H	;	A ← 1H
LD	EA,#2H	;	NOP
LD	A,#3H	;	NOP
LD	23H,A	;	(23H) ← 1H
LD	HL,#10H	;	HL ← 10H
LD	HL,#20H	;	NOP
LD	A,#3H	;	A ← 3H
LD	EA,#35	;	NOP
LD	@HL,A	;	(10H) ← 3H

The following table contains descriptions of special characteristics of the LD instruction when used in different addressing modes:

Instruction		Operation Description and Guidelines
LD	A,#im	Since the “redundancy effect” occurs with instructions like LDEA,#imm, if
		this instruction is used consecutively, the second and additional instructions
		of the same type will be treated like NOPs.
LD	A,@RRa	Load the data memory contents pointed to by 8-bit RRa register pairs
		(HL, WX, WL) to the A register.
LD	A,DA	Load direct data memory contents to the A register.
LD	A,Ra	Load 4-bit register Ra (E, L, H, X, W, Z, Y) to the A register.
LD	Ra,#im	Load 4-bit immediate data into the Ra register (E, L, H, X, W, Y, Z).
LD		Load 8-bit immediate data into the Ra register (EA, HL, WX, YZ). There is a
RR,#imm		redundancy effect if the operation addresses the HL or EA registers.
LD	DA,A	Load contents of register A to direct data memory address.
LD	Ra,A	Load contents of register A to 4-bit Ra register (E, L, H, X, W, Z, Y).

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