KS57C2308/P2308/C2316/P2316 TIMERS and TIMER/COUNTERS
11-19
TC0 COUNTER REGISTER (TCNT0)
The 8-bit counter register for timer/counter 0, TCNT0, is read-only and can be addressed by 8-bit RAM control
instructions. RESET sets all TCNT0 register values to logic zero (00H).
Whenever TMOD0.3 is enabled, TCNT0 is cleared to logic zero and counting resumes. TCNT0 register value is
incremented at the selected edge each time an incoming pulse with reference clock specified by TMOD0 register
(specifically, TMOD0.6, TMOD0.5, and TMOD0.4) is input.
Each time TCNT0 is incremented, the new value is compared with the reference value stored in the TC0
reference buffer, TREF0. When TCNT0 = TREF0, an match signal occurs in the comparator, the interrupt
request flag, IRQT0, is set to logic one, and an interrupt request is generated to indicate that the specified
timer/counter interval has elapsed.
COUNT
CLOCK
TCNT0
TOL0
TIMER START INSTRUCTION
(TMOD0.3 IS SET)
TREF0 REFERENCE VALUE = n
012 n-1 n 0 1 2 n-1 0 1 2n
INTERVAL TIME
IRQT0 SET IRQT0 SET
MATCH MATCH
3
~
~
~
~
~
~
~
~
~
~
~
~~
~~
~
Figure 11-3. TC0 Timing Diagram