Samsung KS57C2308 manual External INTERRUPT0 and INTERRUPT1 Mode Registers, INT1 IMOD0

KS57C2308/P2308/C2316/P2316 INTERRUPTS

EXTERNAL INTERRUPT0 and INTERRUPT1 MODE REGISTERS (Continued)

When a sampling clock rate of fxx/64 is used for INT0, an interrupt request flag must be cleared before 16 machine cycles have elapsed. Since the INT0 pin has a clock-driven noise filtering circuit built into it, please take the following precautions when you use it:

—To trigger an interrupt, the input signal width at INT0 must be at least two times wider than the pulse width of the clock selected by IMOD0. This is true even when the INT0 pin is used for general-purpose input.

INT0	NOISE FILTER		EDGE
	CLOCK
	SELECTOR
	CPU clock	fxx/64
INT1
			IMOD0
	P1.1		P1.0

IRQ0

IRQ1

EDGE

IMOD1

Figure 7-5. Circuit Diagram for INT0 and INT1 Pins

When modifying the IMOD registers, it is possible to accidentally set an interrupt request flag. To avoid unwanted interrupts, take these precautions when writing your programs:

1.Disable all interrupts with a DI instruction.

2.Modify the IMOD register.

3.Clear all relevant interrupt request flags.

4.Enable the interrupt by setting the appropriate IEx flag.

5.Enable all interrupts with an EI instructions.

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