Samsung KS57C2308 manual Watchdog Timer Mode Register Wdmod, Watchdog Timer Counter Wdcnt, Bmod

KS57C2308/P2308/C2316/P2316 TIMERS and TIMER/COUNTERS

WATCHDOG TIMER MODE REGISTER (WDMOD)

The watchdog timer mode register, WDMOD, is a 8-bit write-only register located at RAM address F98H–F99H. WDMOD register controls to enable or disable the watchdog function. WDMOD values are set to logic “A5H” following RESET and this value enables the watchdog timer, and watchdog timer is set to the longest interval because BT overflow signal is generated with the longest interval.

WDMOD	Watchdog Timer Enable/Disable Control
5AH	Disable watchdog timer function
Any other value	Enable watchdog timer function

WATCHDOG TIMER COUNTER (WDCNT)

The watchdog timer counter, WDCNT, is a 3-bit counter. WDCNT is automatically cleared to logic zero, and

restarts whenever the WDTCF register control bit is set to “1”RESET,. stop, and wait signal clears the WDCNT to logic zero also.

WDCNT increments each time a clock pulse of the overflow frequency determined by the current BMOD bit setting is generated. When WDCNT has incremented to hexadecimal “07H”, it is cleared to “00H” and an overflow is generated. The overflow causes the system RESET. When the interrupt request is generated, BCNT immediately resumes counting incoming clock signals.

WATCHDOG TIMER COUNTER CLEAR FLAG (WDTCF)

The watchdog timer counter clear flag, WDTCF, is a 1-bit write instruction. When WDTCF is set to one, it clears the WDCNT to zero and restarts the WDCNT. WDTCF register bits 2–0 are always logic zero.

Table 11-3. Watchdog Timer Interval Time

BMOD	BT Input Clock	WDCNT Input Clock	WDT Interval Time	Main Clock	Sub
	(frequency)	(frequency)			Clock
x000b	fxx/212	fxx/(212 × 28)	fxx/212 × 28 × 23	1.75–2 sec	224–256 sec
x011b	fxx/29	fxx/(29 × 28)	fxx/29 × 28 × 23	218.7–250 ms	28–32 sec
x101b	fxx/27	fxx/(27 × 28)	fxx/27 × 28 × 23	54.6–62.5 ms	7–8 sec
x111b	fxx/25	fxx/(25 × 28)	fxx/25 × 28 × 23	13.6–15.6 ms	1.75–2 sec

NOTES:

1.Clock frequencies assume a system oscillator clock frequency (fxx) of: 4.19 MHz Main clock or 32.768 kHz Sub clock

2.fxx = system clock frequency.

3.If the WDMOD changes such as disable and enable, you must set WDTCF flag to “1” for starting WDCNT from zero state.

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