LCD CONTROLLER/DRIVER

KS57C2308/P2308/C2316/P2316

 

 

Table 12-5. LCD Clock Signal (LCDCK), Frame Frequency and LCD sync Signal (LCDSY)

LCDCK frequency

Static

1/2 Duty

1/3 Duty

1/4 Duty

 

 

 

 

 

 

 

 

 

 

fw/29

= 64 Hz

64

(16)

32

(16)

21

(21)

16

(16)

fw/28 = 128 Hz

128 (32)

64

(32)

43

(43)

32

(32)

fw/27

= 256 Hz

256 (64)

128 (64)

85

(85)

64

(64)

fw/26

= 512 Hz

512

(128)

256

(128)

171

(171)

128

(128)

NOTES:

1.fw = 32.768 kHz

2.The number in parentheses is a frequency for LCDSY.

LCD DRIVE VOLTAGE

LCD Power Supply

Static Mode

1/2 Bias

1/3 Bias

 

 

 

 

VLC0

VLCD

VLCD

VLCD

VLC1

2/3 VLCD

1/2 VLCD

2/3 VLCD

VLC2

1/3 VLCD

1/2 VLCD

1/3 VLCD

GND

0 V

0 V

0 V

 

 

 

 

NOTE: The LCD panel display may deteriorate if DC voltage is applied between the common and segment signals. Therefore, always drive the LCD panel with AC voltage.

LCD VOLTAGE DIVIDING RESISTORS

On-chip voltage dividing resistors for the LCD drive power supply can be configured by internal voltage dividing resistors. Using these internal voltage dividing resistors, you can drive either a 3 V or a 5 V LCD display using external bias. Bias pins are connected externally to the VLCD pin so that it can handle the different LCD drive

voltages. To cut off the current supply to the voltage dividing resistors, clear LCON.0 when you turn the LCD display off.

12-6

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Samsung KS57C2308 manual LCD Drive Voltage, LCD Power Supply Static Mode Bias, Gnd, LCD Voltage Dividing Resistors