KS57P2308/P2316 OTP KS57C2308/P2308/C2316/P2316
16-6
Table 16-5. D.C. Electrical Characteristics (Concluded)
(TA = – 40 °C to + 85 °C, VDD = 1.8 V to 5.5 V)
Parameter Symbol Conditions Min Typ Max Units
VLC0 Output
voltage VLC0 TA = 25 øC0.6 VDD
– 0.2
0.6 VDD 0.6 VDD +
0.2
V
VLC1 Output
voltage VLC1 TA = 25 øC0.4 VDD
– 0.2
0.4 VDD 0.4 VDD
+ 0.2
VLC2 Output
voltage VLC2 TA = 25 øC0.2 VDD
– 0.2
0.2 VDD 0.2 VDD
+ 0.2
Supply
Current (1) IDD1 (2) Main operating:
VDD = 5 V ± 10%
CPU = fx/4
SCMOD = 000B
crystal oscillator
C1 = C2 = 22pF
6.0 MHz
4.19 MHz –3.5
2.5 8
5.5 mA
VDD = 3 V ± 10% 6.0 MHz
4.19 MHz 1.6
1.2 4
3
IDD2 (2) Main Idle mode;
VDD = 5 V ± 10%
CPU = fx/4
SCMOD = 000B
crystal oscillator
C1 = C2 = 22pF
6.0 MHz
4.19 MHz –1.0
0.9 2.5
2.0
VDD = 3 V ± 10% 6.0 MHz
4.19 MHz 0.5
0.4 1.0
0.8
IDD3 Sub operating:
VDD = 3 V ± 10%
CPU = fxt/4
SCMOD = 1001B
32 kHz crystal oscillator
– 15 30 µA
IDD4 Sub Idle mode;
VDD = 3 V ± 10%
CPU = fxt/4, SCMOD = 1101B
32 kHz crystal oscillator
– 6 15
IDD5 Stop mode;
VDD = 5 V ± 10%
CPU = fxt/4, SCMOD = 1101B
–0.5 3
IDD6 (3) Stop mode;
VDD = 5 V ± 10%
CPU = fx/4, SCMOD = 0100B
NOTES:
1. D.C. electrical values for supply current (IDD1 to IDD6) do not include current drawn through internal pull-up resistors and
through LCD voltage dividing resistors.
2. Data includes the power consumption for sub-system clock oscillation.
3. When the system clock mode register, SCMOD, is set to 0100B, the sub-system clock oscillation stops. The
main-system clock oscillation stops by the STOP instruction.