Intel Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion manual Direct Drive LEDs

Models: 249323-003 Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion

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5.0LEDs

LXD9785 PQFP Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion

5.0LEDs

5.1Direct Drive LEDs

The LXD9785 PQFP MII Demo Board provides three programmable LED drivers per port (D4 - D28). Each LED can display one of several available status conditions as selected by the LED Configuration Register (Address 20) shown in Table 8.

.

Table 8. Direct Drive LED Configuration Settings (Register 20)

 

LED Bits

 

Program

 

 

 

 

Description

LED1

LED2

LED3

Bits

 

 

 

 

 

 

 

 

 

 

 

0000

Indicates 100 Mbps operation. (Default for LED1)

 

 

 

 

 

 

 

 

0001

Indicates transmit (Stretched).

 

 

 

 

 

 

 

 

0010

Indicates receive (stretched). (Default for LED3)

 

 

 

 

 

 

 

 

0011

Indicates collision (Stretched).

 

 

 

 

 

 

 

 

0100

Indicates active link (continuous). (Default for LED2)

 

 

 

 

 

 

 

 

0101

Indicates full-duplex.

 

 

 

 

 

 

 

 

0110

Reserved.

 

 

 

 

 

15:12

11:8

7:4

0111

Indicates transmit or receive activity.

 

 

1000

Test Mode. Turn LED on (continuous).

 

 

 

 

 

 

 

 

 

 

 

1001

Test Mode. Turn LED off (continuous).

 

 

 

 

 

 

 

 

1010

Test Mode. Blink LED fast (continuous).

 

 

 

 

 

 

 

 

1011

Test Mode. Blink LED slow (continuous).

 

 

 

 

 

 

 

 

1100

Indicates link and receive status combined1 (Stretched)2.

 

 

 

1101

Indicates link and activity status combined1 (Stretched)2.

 

 

 

1110

Indicates duplex and collision status combined3 (Stretched)2.

 

 

 

1111

Reserved.

 

 

 

 

 

1.Link status is the primary LED driver. The LED is asserted (solid ON) when the link is up. The secondary LED driver (receive, activity, or isolate) causes the LED to change state (blink).

2.Combined event LED settings are not affected by bit 20.1 (Pulse Stretch). These settings are stretched regardless of the value of 20.1.

3.Duplex status is the primary LED driver. The LED is asserted (solid ON) when the link is full-duplex. Collision status is the secondary LED driver. The LED changes state (blinks) when a collision occurs.

The programmable LEDs (LED_1, LED_2, and LED_3) are set in the default mode and are programmable via the MDIO pin. Register address 20 also provides optional LED pulse stretching up to 100 ms. Register bits 20.3:2 select one of three possible stretch times as shown in Table 9 on page 18.

Development Kit Manual

17

Document #: 249323

Revision #: 003

Rev. Date: January 24, 2002

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Intel Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion, 249323-003 Direct Drive LEDs, Development Kit Manual