LXD9785 PQFP Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion

5.0LEDs

5.1Direct Drive LEDs

The LXD9785 PQFP MII Demo Board provides three programmable LED drivers per port (D4 - D28). Each LED can display one of several available status conditions as selected by the LED Configuration Register (Address 20) shown in Table 8.

.

Table 8. Direct Drive LED Configuration Settings (Register 20)

 

LED Bits

 

Program

 

 

 

 

Description

LED1

LED2

LED3

Bits

 

 

 

 

 

 

 

 

 

 

 

0000

Indicates 100 Mbps operation. (Default for LED1)

 

 

 

 

 

 

 

 

0001

Indicates transmit (Stretched).

 

 

 

 

 

 

 

 

0010

Indicates receive (stretched). (Default for LED3)

 

 

 

 

 

 

 

 

0011

Indicates collision (Stretched).

 

 

 

 

 

 

 

 

0100

Indicates active link (continuous). (Default for LED2)

 

 

 

 

 

 

 

 

0101

Indicates full-duplex.

 

 

 

 

 

 

 

 

0110

Reserved.

 

 

 

 

 

15:12

11:8

7:4

0111

Indicates transmit or receive activity.

 

 

1000

Test Mode. Turn LED on (continuous).

 

 

 

 

 

 

 

 

 

 

 

1001

Test Mode. Turn LED off (continuous).

 

 

 

 

 

 

 

 

1010

Test Mode. Blink LED fast (continuous).

 

 

 

 

 

 

 

 

1011

Test Mode. Blink LED slow (continuous).

 

 

 

 

 

 

 

 

1100

Indicates link and receive status combined1 (Stretched)2.

 

 

 

1101

Indicates link and activity status combined1 (Stretched)2.

 

 

 

1110

Indicates duplex and collision status combined3 (Stretched)2.

 

 

 

1111

Reserved.

 

 

 

 

 

1.Link status is the primary LED driver. The LED is asserted (solid ON) when the link is up. The secondary LED driver (receive, activity, or isolate) causes the LED to change state (blink).

2.Combined event LED settings are not affected by bit 20.1 (Pulse Stretch). These settings are stretched regardless of the value of 20.1.

3.Duplex status is the primary LED driver. The LED is asserted (solid ON) when the link is full-duplex. Collision status is the secondary LED driver. The LED changes state (blinks) when a collision occurs.

The programmable LEDs (LED_1, LED_2, and LED_3) are set in the default mode and are programmable via the MDIO pin. Register address 20 also provides optional LED pulse stretching up to 100 ms. Register bits 20.3:2 select one of three possible stretch times as shown in Table 9 on page 18.

Development Kit Manual

17

Document #: 249323

Revision #: 003

Rev. Date: January 24, 2002

Page 17
Image 17
Intel Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion manual Direct Drive LEDs, LED Bits Program Description

249323-003, Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion specifications

The Intel 249323-003 demo board is an advanced platform designed for SS-SMII (Synchronous Serial - Synchronous Media Independent Interface) to MII (Media Independent Interface) conversion, utilizing FPGA technology. This demo board serves as a pivotal tool for developers and engineers in the field, facilitating the evaluation and testing of high-speed networking applications, particularly those involving fiber-optic communication.

At its core, the Intel 249323-003 is equipped with a robust FPGA that is capable of handling complex data processing tasks with high efficiency. The FPGA architecture allows for flexible configuration, enabling users to customize the interface as per their specific application requirements. This adaptability is crucial in developing solutions for various networking protocols, ensuring seamless integration across different mediums.

One of the standout features of the demo board is its support for fiber-optic connections, which are essential for high-speed data transmission over long distances. The board includes interfaces that allow for the connection of fiber transceivers, thereby facilitating faster communication speeds and improved bandwidth efficiency. This capability is particularly beneficial for applications in data centers, telecommunications, and other high-bandwidth scenarios.

Additionally, the Intel 249323-003 demo board showcases low latency performance, a critical characteristic for real-time applications. This feature is achieved through sophisticated design and optimization techniques that ensure quick data processing. The board also supports various data rates, making it versatile enough for different use cases.

Another important aspect is the board’s power consumption efficiency. By implementing advanced power management techniques, the Intel 249323-003 minimizes energy usage while maximizing performance, making it a cost-effective solution for developers looking to create sustainable applications.

In terms of connectivity, the demo board offers multiple I/O options, facilitating interaction with other devices and systems. This eases the development process, allowing engineers to prototype and test their designs rapidly.

In conclusion, the Intel 249323-003 demo board is a sophisticated and versatile platform for SS-SMII to MII conversion. With its powerful FPGA, support for fiber-optic interfaces, low latency, and efficient power management, it stands out as a vital resource for developers working on high-speed networking solutions. Whether for prototyping or extensive testing, this demo board equips engineers with the tools necessary to innovate and elevate their networking projects to new heights.