Intel Control, IXD1110 Demo, Board, Intel, Interface, Revision Date June 27, FPGA Caps, Power

Development Kit Manual

Document Number: 250807

Revision Number: 003

Revision Date: June 27, 2003

35

Figure 14.

5

4

3

2

1

Intel

U8J

Vdd_3P3

Vdd_2P5

Power

®

53

VCC_CKLK

GND

6

IXD1110

15

GND

R216

R217

R218

R219

25

GND

U8A

40

GND

1K

1K

1K

1K

16

52

IXF1110 & CPU Interfaces

VCCINT

GND

Vdd_3P3

50

56

105

VCCINT

GND

D

TP1

TDI

75

VCCINT

+2.5V

GND

58

D

34

85

66

TMS

VCCINT

GND

R220

1

103

84

TCK

VCCINT

GND

4

127

93

10K

TDO

VCCINT

GND

1

104

CPU

GND

123

GND

nCONFIG

74

124

nCONFIG

Vdd_3P3

GND

CONF_DONE

2

55

BUS_CLK

BUS_CLK

10,11

126

CONF_DONE

bus_clk

GND

nSTATUS

35

129

nSTATUS

GND

DCLK

107

69

Start_XFER

139

DCLK

TS_n

Start_XFER

10,11

GND

DATA0

108

72

TA

5

Interface

DATA0

TA_n

TA

10,11

VCCIO

65

RD/~WR

24

RD_WR_n

RD/~WR 10,11

VCCIO

70

Bus_Busy

45

57

Bus_busy_n

Bus_Busy

10,11

VCCIO

GND_CKLK

68

Bus_Grant

61

Bus_grant_n

Bus_Grant

10,11

VCCIO

+3.3V

67

Bus_Request

71

39

3

Bus_request_n

Bus_Request 10,11

VCCIO

NC

nCEO

94

VCCIO

NC

42

Vdd_3P3

77

115

59

GND

MSEL0

VCCIO

NC

76

79

CsN

134

60

MSEL1

IXF_CsN

CsN 10,11

VCCIO

NC

Vdd_3P3

106

78

R116

0

128

nCE

IXF_Sel

NC

R1264

73

GENP_CsN

136

GenP_CsN

GENP_CsN

10,11

NC

137

NC

R1265

1K

GND

uPx_Data[31:0] 2,10,11

141

NC

Control

uPx_RdyN

17

80

uPx_Data0

GND

1K2,11

uPx_RdyN

uPx_RdyN_0

cpu_DATA0

81

uPx_Data1

EP1K30TC144-1-IXF-FX

22

CPU

cpu_DATA1

82

uPx_Data2

C

uPx_RdyN_1

cpu_DATA2

C

83

uPx_Data3

cpu_DATA3

uPx_RdN

R222

50

20

86

uPx_Data4

2,11

uPx_RdN

uPx_RdN

cpu_DATA4

87

uPx_Data5

cpu_DATA5

uPx_WrN

R223

50

21

88

uPx_Data6

2,11

uPx_WrN

uPx_WrN

cpu_DATA6

uPx_CsN

R224

50

18

IXF1110

Buscpu_DATA7

89

uPx_Data7

2,11

uPx_CsN

uPx_CsN_0

cpu_DATA8

90

uPx_Data8

91

uPx_Data9

cpu_DATA9

19

92

uPx_Data10

uPx_CsN_1

cpu_DATA10

95

uPx_Data11

cpu_DATA11

96

uPx_Data12

cpu_DATA12

TxPauseFR

R226

50

135

97

uPx_Data13

2,11 TxPauseFR

IXF0_TxPauseFR

cpu_DATA13

98

uPx_Data14

cpu_DATA14

99

uPx_Data15

cpu_DATA15

2,11

TxPauseAdd0

TxPauseAdd0

R227

50

133

IXF0_TxPauseAdd0

Interfacecpu_DATA16

100

uPx_Data16

2,11

TxPauseAdd1

TxPauseAdd1

R228

50

132

IXF0_TxPauseAdd1

Interface

cpu_DATA17

101

uPx_Data17

FPGA Caps

TxPauseAdd2

R229

50

131

102

uPx_Data18

2,11

TxPauseAdd2

IXF0_TxPauseAdd2

cpu_DATA18

TxPauseAdd3

R230

50

130

109

uPx_Data19

2,11

TxPauseAdd3

IXF0_TxPauseAdd3

cpu_DATA19

110

uPx_Data20

cpu_DATA20

111

uPx_Data21

Vdd_2P5

Vdd_3P3

cpu_DATA21

41

112

uPx_Data22

IXF1_TxPauseFR

cpu_DATA22

cpu_DATA23

113

uPx_Data23

114

uPx_Data24

cpu_DATA24

43

116

uPx_Data25

+

C106

C111

+

C107

C112

+

C108

C113

+

C109

IXF1_TxPauseAdd0

cpu_DATA25

B

44

117

uPx_Data26

C110

0.22uF

0.22uF

0.22uF

0.22uF

B

IXF1_TxPauseAdd1

cpu_DATA26

46

IXF1_TxPauseAdd2

cpu_DATA27

118

uPx_Data27

0.022uF

0.022uF

0.022uF

0.022uF

47

119

uPx_Data28

IXF1_TxPauseAdd3

cpu_DATA28

120

uPx_Data29

C118

+ C114

C119

+

C115

C120

+

C116

C121

+

C117

cpu_DATA29

121

uPx_Data30

0.22uF

0.22uF

0.22uF

0.22uF

cpu_DATA30

0.022uF

0.022uF

0.022uF

0.022uF

cpu_DATA31

122

uPx_Data31

J25 SMB

2

3

1

125

clk_in

4

54

reset_n

GND

reset

reset_n

2,8

5

R378

50

140

I2C_CLK_IXF0_OUT

R360

10K

EP1K30TC144-1-IXF-FX

Vdd_3P3

Vdd_3P3

Vdd_3P3

IXD1110 Demo

C122

GND

GND

R236

R237

U22

C291

10K

10K

0.01uF

0.01uF

U18

7

8

1

5

OE

VCC

GND

GND

VCC

I2C_CLK_OUT

2

A

J26 SMB

nSTATUS

3

OE

DATA

1

DATA0

2

Intel Communications Group

A

3

GND

Y

4

R358

50

I2C_CLK_BUF

1

3

CONF_DONE

4

nCS

DCLK

2

DCLK

A

4

9750 Goethe Road

5

GND

nCASC

6

Sacramento, CA 95827

NC7SZ125M5

GND

GND

EPC1PC8

VCC

Title

5

IXD1110 - FX DEMO Board

Board

Size

Document Number

Rev

GND

B

CPU I/F Control

A1

X = DO NOT INSTALLDate:

Friday, May 24, 2002

Sheet

9

of

14

5

4

3

2

1