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Intel IXD1110 manual Reset Test Points, 8.2 IXF1110 Input Clock Test Points, GBIC Test Points

Models: IXD1110

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8.0Test Points

IXD1110 Demo Board

8.0Test Points

8.1Reset Test Points

Two test points allow evaluation of the IXF1110 reset signals. TP21 allows IXF1110 Sys_Res signal monitoring. DTP3 allows board reset signal monitoring. The board Sys_Res can be monitored on both test points if it is asserted by Switch S1 or the CPU. The reset is seen at TP21 if an IXF1110 reset is issued by the software interface.

Table 5. Intel® IXF1110 Reset Test Points

Test Point		Symbol			IXF1110 Ball	Description
					Designator


TP21					Y4	System reset for IXF1110
		Sys_Res

DTP3					–	Board reset
		Sys_Res

NOTE: DTP = Differential Test Point, TP = Test Point

8.2IXF1110 Input Clock Test Points

The IXF1110 requires input clocks of 50 and 125 MHz. There are two test points that allow the user to monitor those signals (see Table 6).

Table 6. Intel® IXF1110 Differential Input Clock Test Points

Test Point	Symbol		IXF1110 Ball	Description
Test Point	Symbol		Designator	Description
			Designator

DTP1	CLK125		AA5	125 MHz input clock for IXF1110

DTP2	CLK50		C21	50 MHz input clock for IXF1110

NOTE: DTP = Differential Test Point

8.3GBIC Test Points

Table 7 lists GBIC test points that allow evaluation of the I2C clock, which is connected to all of the GBIC modules, and the I2C Data pins for each of the ten ports. For more information on the I2C interface, refer to the IXF1110 Datasheet.

Table 7. GBIC Test Points (Sheet 1 of 2)

Test Point	Symbol		IXF1110 Ball	Description
Test Point	Symbol		Designator	Description
			Designator

DTP6	I2C_CLK		L19	I2C_CLK for IXF1110
DTP7	I2C_DATA_0		G22	I2C_DATA_0 for IXF1110
DTP8	I2C_DATA_1		G23	I2C_DATA_1 for IXF1110
DTP9	I2C_DATA_2		J24	I2C_DATA_2 for IXF1110
DTP10	I2C_DATA_3		F22	I2C_DATA_3 for IXF1110
NOTE: DTP = Differential Test Point

20	Development Kit Manual

Document Number: 250807

Revision Number: 003

Revision Date: June 27, 2003

Image 20

Intel IXD1110 manual Reset Test Points, 8.2 IXF1110 Input Clock Test Points, GBIC Test Points Sheet 1 of

Contents

Development Kit Manual Intel IXD1110 Demo BoardJune Document Number Revision Number Revision Date June 27Development Kit Manual Document Number Revision Number Revision Date June 27Contents ContentsIntel IXD1110 Demo Board Power Revision A1 FiguresTables Intel IXD1110 Demo Board Bill of Materials Rev. A1Development Kit Manual Revision HistoryContents Document Number Revision Number Revision Date June 27 ContentsDevelopment Kit Manual 1.0 Introduction 1.1 About This Kit1.2 Additional Equipment Required IXD1110 Demo BoardIXD1110 Demo Board 1.3.1 Features1.3 About The IXD1110 Demo Board 1.3.2 Component Location and Description Figure 1. Intel IXD1110 Demo Board Top ViewTable 1. Intel IXD1110 Demo Board Principal Components IntelTable 1. Intel IXD1110 Demo Board Principal Components Continued IXD1110 Demo BoardDevelopment Kit Manual to Section 4.1, “CPU FPGA” on page 14 for more information2.1 Setup 2.0 Quick StartIXD1110 Demo Board Development Kit ManualIXD1110 Demo Board 3.0 Typical Test SetupFigure 2. Typical Test Setup 4.0 CPU Daughter Card Figure 3. Intel IXF1110 CPU Daughter CardTable 2. Pinout for DB-9-to-RJ-45 Connector IXD1110 Demo BoardIXD1110 Demo Board 4.1 CPU FPGA4.2 IXF1110 Register Modifications on Startup 5.0 IXF1110 Software 5.1 PC RequirementsIXD1110 Demo Board Development Kit ManualIXD1110 Demo Board 5.2 Installing the IXF1110 Software5.3 Changing the IP Address of the CPU Daughter Card Optional Development Kit Manual IXD1110 Demo BoardParity None Stops bits Flow Control None 6.0 Optional Configurations 6.1 Reset Jumper JP26.2 JTAG Test Signals Table 3. JTAG Test Signals JP17.0 LEDs Table 4. IXF1110 LED BehaviorIXD1110 Demo Board Development Kit Manual8.1 Reset Test Points Table 5. Intel IXF1110 Reset Test Points8.0 Test Points 8.2 IXF1110 Input Clock Test Points8.4 Mictor Connectors Table 8. Mictor Connector Test Points Sheet 1 ofTable 7. GBIC Test Points Sheet 2 of IXD1110 Demo Board8.5 Power and Ground Test Points Table 8. Mictor Connector Test Points Sheet 2 ofTable 9. Power Test Points Sheet 1 of IXD1110 Demo BoardTable 9. Power Test Points Sheet 2 of Table 10. Ground Test PointsIXD1110 Demo Board Development Kit Manual8.6 Unused Test Points Table 11. Unused Test PointsIXD1110 Demo Board Development Kit ManualSchematics IXD1110 Demo Board Power Revision A1Figure 4. Intel Power GBIC & Board ICsDigital Power IXD1110 DemoBoard IXF1110 - Power CapsFigure 6. Intel IXD1110 Analog Power X = DO NOT INSTALLAnalog Power SerdesPowerControl X = DO NOT INSTALLReset BoardFigure 8. Intel IXD1110 SerDes GBIC Ports X = DO NOT INSTALLIXD1110 Demo Board Revision Date June 27SerDes GBIC Ports X = DO NOT INSTALLIXD1110 Demo BoardFigure 10. Intel IXD1110 SerDes GBIC Ports X = DO NOT INSTALLIXD1110 Demo Board Revision Date June 27Figure 11. Intel BoardIXD1110 X = DO NOT INSTALLFigure 12. Intel IXD1110 SPI4-2X = DO NOT INSTALL SPI-4 Phase 2 - RXLEDs X = DO NOT INSTALLIXD1110 Demo BoardX = DO NOT INSTALLDate PowerIXD1110 ControlConnectors X = DO NOT INSTALL DateIXD1110 Demo BoardFigure 16. Intel ManualIXD1110 CPU Logic Probe Connectors PROBE C Address PROBE A Data Bus Bus & IXF1110 Signals10.0 Bill of Materials Table 12. Intel IXD1110 Demo Board Bill of Materials Rev. A1IXD1110 Demo Board Development Kit ManualIXD1110 Demo Board Development Kit ManualIXD1110 Demo Board Development Kit Manual