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Intel manual Cpu Fpga, 4.2 IXF1110 Register Modifications on Startup, IXD1110 Demo Board

Models: IXD1110

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IXD1110 Demo Board

For more information on the HyperTerminal and GUI interfaces, please refer to the IXF1110 Software Help File.

4.1CPU FPGA

The IXD1110 demo board has a Field Programmable Gate Array (FPGA) that allows the Motorola* CPU, which requires a synchronous interface, to interoperate with the asynchronous IXF1110 CPU interface.

For additional information regarding the IXF1110 CPU interface, refer to the IXF1110 Datasheet.

4.2IXF1110 Register Modifications on Startup

The Motorola* CPU automatically modifies some of the IXF1110 registers on startup to put the board in a 1000 Mbps evaluation mode. The following registers are modified from default settings on startup:

•TX FIFO Highwater Mark Ports 0-9 are set to 0x00000BB8

•RX FIFO Errored Frame Drop Enable is set to 0x000003FF

•MAC Transfer Threshold Ports 0-9 are set to 0x000003E8

•Diverse Config Ports 0-9 are set to 0x0000112D

•LED Control is set to 0x00000003

For additional information on these registers, please refer to the IXF1110 Datasheet.

14	Development Kit Manual

Document Number: 250807

Revision Number: 003

Revision Date: June 27, 2003

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Intel manual Cpu Fpga, 4.2 IXF1110 Register Modifications on Startup, IXD1110 Demo Board

Contents

June Development Kit ManualIntel IXD1110 Demo Board Document Number Revision Number Revision Date June 27Development Kit Manual Document Number Revision Number Revision Date June 27Contents ContentsTables Intel IXD1110 Demo Board Power Revision A1Figures Intel IXD1110 Demo Board Bill of Materials Rev. A1Development Kit Manual Revision HistoryContents Document Number Revision Number Revision Date June 27 ContentsDevelopment Kit Manual 1.2 Additional Equipment Required 1.0 Introduction1.1 About This Kit IXD1110 Demo BoardIXD1110 Demo Board 1.3.1 Features1.3 About The IXD1110 Demo Board Table 1. Intel IXD1110 Demo Board Principal Components 1.3.2 Component Location and DescriptionFigure 1. Intel IXD1110 Demo Board Top View IntelDevelopment Kit Manual Table 1. Intel IXD1110 Demo Board Principal Components ContinuedIXD1110 Demo Board to Section 4.1, “CPU FPGA” on page 14 for more informationIXD1110 Demo Board 2.1 Setup2.0 Quick Start Development Kit ManualIXD1110 Demo Board 3.0 Typical Test SetupFigure 2. Typical Test Setup Table 2. Pinout for DB-9-to-RJ-45 Connector 4.0 CPU Daughter CardFigure 3. Intel IXF1110 CPU Daughter Card IXD1110 Demo BoardIXD1110 Demo Board 4.1 CPU FPGA4.2 IXF1110 Register Modifications on Startup IXD1110 Demo Board 5.0 IXF1110 Software5.1 PC Requirements Development Kit ManualIXD1110 Demo Board 5.2 Installing the IXF1110 Software5.3 Changing the IP Address of the CPU Daughter Card Optional Development Kit Manual IXD1110 Demo BoardParity None Stops bits Flow Control None 6.2 JTAG Test Signals 6.0 Optional Configurations6.1 Reset Jumper JP2 Table 3. JTAG Test Signals JP1IXD1110 Demo Board 7.0 LEDsTable 4. IXF1110 LED Behavior Development Kit Manual8.0 Test Points 8.1 Reset Test PointsTable 5. Intel IXF1110 Reset Test Points 8.2 IXF1110 Input Clock Test PointsTable 7. GBIC Test Points Sheet 2 of 8.4 Mictor ConnectorsTable 8. Mictor Connector Test Points Sheet 1 of IXD1110 Demo BoardTable 9. Power Test Points Sheet 1 of 8.5 Power and Ground Test PointsTable 8. Mictor Connector Test Points Sheet 2 of IXD1110 Demo BoardIXD1110 Demo Board Table 9. Power Test Points Sheet 2 ofTable 10. Ground Test Points Development Kit ManualIXD1110 Demo Board 8.6 Unused Test PointsTable 11. Unused Test Points Development Kit ManualFigure 4. Intel SchematicsIXD1110 Demo Board Power Revision A1 Power GBIC & Board ICsBoard Digital PowerIXD1110 Demo IXF1110 - Power CapsAnalog Power Figure 6. Intel IXD1110 Analog PowerX = DO NOT INSTALL SerdesPowerReset ControlX = DO NOT INSTALL BoardIXD1110 Demo Board Figure 8. Intel IXD1110 SerDes GBIC PortsX = DO NOT INSTALL Revision Date June 27IXD1110 Demo SerDes GBIC PortsX = DO NOT INSTALL BoardIXD1110 Demo Board Figure 10. Intel IXD1110 SerDes GBIC PortsX = DO NOT INSTALL Revision Date June 27IXD1110 Figure 11. IntelBoard X = DO NOT INSTALLX = DO NOT INSTALL Figure 12. IntelIXD1110 SPI4-2 SPI-4 Phase 2 - RXIXD1110 Demo LEDsX = DO NOT INSTALL BoardIXD1110 X = DO NOT INSTALLDatePower ControlIXD1110 Demo ConnectorsX = DO NOT INSTALL Date BoardIXD1110 CPU Logic Probe Connectors Figure 16. IntelManual PROBE C Address PROBE A Data Bus Bus & IXF1110 SignalsIXD1110 Demo Board 10.0 Bill of MaterialsTable 12. Intel IXD1110 Demo Board Bill of Materials Rev. A1 Development Kit ManualIXD1110 Demo Board Development Kit ManualIXD1110 Demo Board Development Kit Manual