•Parallel input connector port Signal allocation (Signal : ECP)
Pin No. | Return |
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1 | 19 |
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| PC/DP | Forward data transfer : Becomes “Low” when PeriphAck is |
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| HostClk | ||||||||
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| “Low” and there is data to be read. Returns to “High” when |
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| PeriphAck becomes “High”. |
2 | 20 |
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| DATA1(LSB) | PC/DP | High: data 1 | ||||||
3 | 21 |
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| DATA2 | PC/DP | Low: data 0 | ||||
4 | 22 |
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| DATA3 | PC/DP |
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5 | 23 |
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| DATA4 | PC/DP | Information will be expressed for parallel data of every signal | ||||
6 | 24 |
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| DATA5 | PC/DP | from bit No.1 to No.8. | ||||
7 | 25 |
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| DATA6 | PC/DP |
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8 | 26 |
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| DATA7 | PC/DP |
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9 | 27 |
| DATA8(MSB) | PC/DP |
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10 | 28 |
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| PeriphClk | PC/DP | Reverse data transfer : Sends “Low” data when HostAck is | |||||
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| “Low”. Returns to “High” when HostAck becomes “High”. |
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11 | 29 |
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| PeriphAck | PC/DP | Forward data transfer: | |||||
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| High: DP is on BUSY status. |
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| Low: DP can accept data. |
12 |
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| PC/DP | High: Forward data transfer (Receive) | |||
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| AckReverse | |||||||||
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| Low: Reverse data transfer (Send) |
13 |
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| Xflag | PC/DP | High: During supporting ECP mode | ||||
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14 |
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| HostAck | PC/DP | Reverse data transfer: | ||||
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| High: PC is on BUSY status. |
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| Low: PC can send data. |
16•17 |
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| GND |
| Earth | ||||
18 |
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| High | PC/DP | PeripheralLogicHigh | ||||
19 - 30 |
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| GND | PC/DP | Earth | ||||
31 | 16 |
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| PC/DP | Low : When PC requests DP to send data | ||
Reverse Request | ||||||||||||
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| PC/DP | Low : When DP requests PC to send data | |
32 |
| Periph Request | ||||||||||
15• |
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| NC |
| Unused | ||||
33 - 35 |
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36 |
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| 1284 Active | PC/DP | Becomes “High” when DP requests each mode of IEEE1284. | ||||||
22
