Motorola DSP56012 - page 14

xiv Motorola
Figure 4-13 Command Vector Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-29
Figure 4-14 Host Processor Transfer Timing . . . . . . . . . . . . . . . . . . . . . . . . .4-37
Figure 4-15 Interrupt Vector Register Read Timing . . . . . . . . . . . . . . . . . . . .4-40
Figure 4-16 HI Interrupt Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-40
Figure 4-17 DMA Transfer Logic and Timing . . . . . . . . . . . . . . . . . . . . . . . . .4-41
Figure 4-18 HI Initialization Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-42
Figure 4-19 HI Initialization—DSP Side . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-43
Figure 4-20 HI Initialization—Host Side, Interrupt Mode . . . . . . . . . . . . . . . .4-44
Figure 4-21 HI Mode and INIT Bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-45
Figure 4-22 HI Initialization—Host Side, Polling Mode. . . . . . . . . . . . . . . . . .4-46
Figure 4-23 HI Configuration—Host Side. . . . . . . . . . . . . . . . . . . . . . . . . . . .4-46
Figure 4-24 HI Initialization–Host Side, DMA Mode. . . . . . . . . . . . . . . . . . . .4-47
Figure 4-25 Bits Used for Host-to-DSP Transfer . . . . . . . . . . . . . . . . . . . . . .4-48
Figure 4-26 Data Transfer from Host to DSP. . . . . . . . . . . . . . . . . . . . . . . . .4-50
Figure 4-27 Host Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-52
Figure 4-28 Receive Data from Host—Main Program . . . . . . . . . . . . . . . . . .4-53
Figure 4-29 Receive Data from Host Interrupt Routine . . . . . . . . . . . . . . . . .4-53
Figure 4-30 Transmit/Receive Byte Registers . . . . . . . . . . . . . . . . . . . . . . . .4-54
Figure 4-31 Bootstrap Using the Host Interface. . . . . . . . . . . . . . . . . . . . . . .4-55
Figure 4-32 Bits Used for DSP to Host Transfer . . . . . . . . . . . . . . . . . . . . . .4-57
Figure 4-33 Data Transfer from DSP to Host. . . . . . . . . . . . . . . . . . . . . . . . .4-58
Figure 4-34 Main Program: Transmit 24-bit Data to Host . . . . . . . . . . . . . . .4-59
Figure 4-35 HI Hardware–DMA Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-60