Motorola DSP56012 - page 256

B-24 DSP56012 User’s Manual MOTOROLA
Programming Reference
Application: Date:
Programmer:
Sheet 1 of 3
S.H.I.
* = Reserved, write as 0
1514131211109876543210
HDM4 HDM2 HDM1 HDM0 HRS CPOLCPHA
SHI Clock Control
X:$FFF0
Reset = $000001
Register (HCKR)
19 18 17 1623 22 21 20 *
0
*
0HDM3
*
0*
0
*
0
*
0
*
0
*
0
*
0
1514131211109876543210
SHI Slave Address
X:$FFF2
Reset = $Bx0000
Register (HSAR)
19 18 17 1623 22 21 20 HA1HA3HA5 *
0
*
0
HA6 *
0
*
0
*
0
*
0
*
0
*
0
*
0
*
0
*
0*
0*
0
*
0
*
0
*
0
*
0
*
0
*
0
HA4
0000
*
0*
0
*
0
*
0
00
HDM5
HCKR Divider Modulus Select
HSAR I2C Slave Address
Slave address = Bits HA6-HA3, HA1 and external pins HA2, HA0 Slave address after reset = 1011_HA2_0_HA0
HFM1 HFM0 SHI Noise Reduction Filter Mode
0 0 Bypassed (Filter disabled) 0 1 Reserved 1 0 Narrow spike tolerance 1 1 Wide spike tolerance
HFM0HFM1
SHI Clock Control Register (HCKR)
SHI Slave Address Register (HSAR)
CPOL CPHA Result
0 0 SCK active low, strobe on rising edge 0 1 SCK active low, strobe on falling edge 1 0 SCK active high, strobe on falling edge 1 1 SCK active high, strobe on rising edge
HRS Result
0 Prescaler operational 1 Prescaler bypassed