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NEC 78K/0 Series 1.7 Special Function Register (SFR) Area, 1.8 External Memory Space, 1.9 IEBusTM Register Area

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CHAPTER 1 MEMORY SPACE

User's Manual U12326EJ4V0UM

(3) RAM for VFD display

There are some products in the 78K/0 Series to which RAM for VFD display is allocated. This RAM can

also be used as an ordinary RAM area.

(4) Internal expansion RAM

There are some products in the 78K/0 Series to which internal expansion RAM is allocated.

(5) RAM for LCD display

There are some products in the 78K/0 Series to which RAM for LCD display is allocated. This RAM can

also be used as an ordinary RAM area.

1.7 Special Function Register (SFR) Area

On-chip peripheral hardware special function registers (SFRs) are allocated in the area FF00H to FFFFH (for

details of the special function registers, refer to the user’s manual of each product).

Caution Do not access addresses to which SFRs are not allocated. If an address is erroneously

accessed, the CPU may become deadlocked.

1.8 External Memory Space

This is an external memory space that can be accessed by setting the memory extension mode register. This

space can store program and table data, and be assigned peripheral devices.

For details of the products in which an external memory space can be used, refer to the user’s manual of each

product.

1.9 IEBusTM Register Area

IEBus registers that are used to control the IEBus controller are allocated to the IEBus register area.

For details of the products that incorporate an IEBus controller, refer to the user’s manual of each product.

Contents

Main Page IEBus is a trademark of NEC Corporation. NOTES FOR CMOS DEVICES 4 Regional Information NEC Electronics Hong Kong Ltd. Device availability Ordering information Product release schedule Page INTRODUCTION Page Page Page Page Page 1.7 Special Function Register (SFR) Area 1.8 External Memory Space 1.9 IEBusTM Register Area 14 CHAPTER 2 REGISTERS 2.1 Control Registers Page Figure 2-5. Data to Be Reset from Stack Memory 2.2 General-Purpose Registers CHAPTER 2 REGISTERS Figure 2-6. General-Purpose Register Configuration (a) Absolute names (b) Functional names 2.3 Special Function Registers (SFRs) 20 CHAPTER 3 ADDRESSING 3.1 Instruction Address Addressing Page Page Page 3.2 Operand Address Addressing Page Page Page Page Page Page Page 32 CHAPTER 4 INSTRUCTION SET 4.1 Operation Page Page CHAPTER 4 INSTRUCTION SET Note Except r = A. CHAPTER 4 INSTRUCTION SET Note Only when rp = BC, DE or HL. (2) 16-bit instructions MOVW, XCHW, ADDW, SUBW, CMPW, PUSH, POP, INCW, DECW (3) Bit manipulation instructions MOV1, AND1, OR1, XOR1, SET1, CLR1, NOT1, BT, BF, BTCLR Page 4.2 Instruction Codes 4.2.2 Instruction code list Notes 1. Only when rp = BC, DE or HL. 2. Except r = A. Page Page Page Page Page Page Page Page MOV XCH Page MOVW XCHW Page ADD ADDC SUB SUBC AND OR XOR CMP Page ADDW SUBW CMPW Page MULU DIVUW Page INC DEC INCW DECW Page ROR ROL RORC ROLC ROR4 ROL4 Page ADJBA ADJBS Page MOV1 AND1 OR1 XOR1 SET1 CLR1 NOT1 Page CALL CALLF CALLT BRK RET RETI RETB Page PUSH POP MOVW SP , src MOVW AX, SP Page BR Page BC BNC BZ BNZ BT BF BTCLR DBNZ Page SEL RBn NOP EI DI HALT STOP APPENDIX A REVISION HISTORY 124 APPENDIX B INSTRUCTION INDEX (MNEMONIC: BY FUNCTION) Page 126 APPENDIX C INSTRUCTION INDEX (MNEMONIC: IN ALPHABETICAL ORDER) Page Page Facsimile Message Thank you for your kind support. From: