NEC 78K/0 Series 4.2 Instruction Codes

CHAPTER 4 INSTRUCTION SET

User's Manual U12326EJ4V0UM

4.2 Instruction Codes

4.2.1 Description of instruction code table

rrpRB

R2R1R0reg P1P0reg-pair RB1RB0reg-bank

0 0 0 R0 X 0 0 RP0 AX 0 0 RB0

0 0 1 R1 A 0 1 RP1 BC 0 1 RB1

0 1 0 R2 C 1 0 RP2 DE 1 0 RB2

0 1 1 R3 B 1 1 RP3 HL 1 1 RB3

100R4E

101R5D

110R6L

111R7H

Bn: Immediate data corresponding to bit

Data: 8-bit immediate data corresponding to byte

Low/High byte: 16-bit immediate data corresponding to word

Saddr-offset: 16-bit address lower 8-bit offset data corresponding to saddr

Sfr-offset: sfr 16-bit address lower 8-bit offset data

Low/High addr: 16-bit immediate data corresponding to addr16

jdisp: Signed two’s complement data (8 bits) of relative address distance between the start

and branch addresses of the next instruction

fa10 to fa0: 11 bits of immediate data corresponding to addr11

ta4 to ta0: 5 bits of immediate data corresponding to addr5

Contents

Main Page IEBus is a trademark of NEC Corporation. NOTES FOR CMOS DEVICES 4 Regional Information NEC Electronics Hong Kong Ltd. Device availability Ordering information Product release schedule Page INTRODUCTION Page Page Page Page Page 1.7 Special Function Register (SFR) Area 1.8 External Memory Space 1.9 IEBusTM Register Area 14 CHAPTER 2 REGISTERS 2.1 Control Registers Page Figure 2-5. Data to Be Reset from Stack Memory 2.2 General-Purpose Registers CHAPTER 2 REGISTERS Figure 2-6. General-Purpose Register Configuration (a) Absolute names (b) Functional names 2.3 Special Function Registers (SFRs) 20 CHAPTER 3 ADDRESSING 3.1 Instruction Address Addressing Page Page Page 3.2 Operand Address Addressing Page Page Page Page Page Page Page 32 CHAPTER 4 INSTRUCTION SET 4.1 Operation Page Page CHAPTER 4 INSTRUCTION SET Note Except r = A. CHAPTER 4 INSTRUCTION SET Note Only when rp = BC, DE or HL. (2) 16-bit instructions MOVW, XCHW, ADDW, SUBW, CMPW, PUSH, POP, INCW, DECW (3) Bit manipulation instructions MOV1, AND1, OR1, XOR1, SET1, CLR1, NOT1, BT, BF, BTCLR Page 4.2 Instruction Codes 4.2.2 Instruction code list Notes 1. Only when rp = BC, DE or HL. 2. Except r = A. Page Page Page Page Page Page Page Page MOV XCH Page MOVW XCHW Page ADD ADDC SUB SUBC AND OR XOR CMP Page ADDW SUBW CMPW Page MULU DIVUW Page INC DEC INCW DECW Page ROR ROL RORC ROLC ROR4 ROL4 Page ADJBA ADJBS Page MOV1 AND1 OR1 XOR1 SET1 CLR1 NOT1 Page CALL CALLF CALLT BRK RET RETI RETB Page PUSH POP MOVW SP , src MOVW AX, SP Page BR Page BC BNC BZ BNZ BT BF BTCLR DBNZ Page SEL RBn NOP EI DI HALT STOP APPENDIX A REVISION HISTORY 124 APPENDIX B INSTRUCTION INDEX (MNEMONIC: BY FUNCTION) Page 126 APPENDIX C INSTRUCTION INDEX (MNEMONIC: IN ALPHABETICAL ORDER) Page Page Facsimile Message Thank you for your kind support. From: