NEC 78K/0 Series 4.2.2 Instruction code list

39

CHAPTER 4 INSTRUCTION SET

User's Manual U12326EJ4V0UM

4.2.2 Instruction code list

Instruction

Mnemonic

Operands Operation Code

Group B1 B2 B3 B4

8-Bit Data MOV r,#byte 1010 0

R2R1R0

Data

Transfer saddr,#byte 0001 0001 Saddr-offset Data

sfr,#byte 0001 0011 Sfr-offset Data

A,r Note 0110 0

R2R1R0

r,A Note 0111 0

R2R1R0

A,saddr 1111 0000 Saddr-offset

saddr,A 1111 0010 Saddr-offset

A,sfr 1111 0100 Sfr-offset

sfr,A 1111 0110 Sfr-offset

A,!addr16 1000 1110 Low addr High addr

!addr16,A 1001 1110 Low addr High addr

PSW,#byte 0001 0001 0001 1110 Data

A,PSW 1111 0000 0001 1110

PSW,A 1111 0010 0001 1110

A,[DE] 1000 0101

[DE],A 1001 0101

A,[HL] 1000 0111

[HL],A 1001 0111

A,[HL+byte] 1010 1110 Data

[HL+byte],A 1011 1110 Data

A,[HL+B] 1010 1011

[HL+B],A 1011 1011

A,[HL+C] 1010 1010

[HL+C],A 1011 1010

XCH A,r Note 0011 0

R2R1R0

A,saddr 1000 0011 Saddr-offset

A,sfr 1001 0011 Sfr-offset

A,!addr16 1100 1110 Low addr High addr

A,[DE] 0000 0101

A,[HL] 0000 0111

A,[HL+byte] 1101 1110 Data

A,[HL+B] 0011 0001 1000 1011

A,[HL+C] 0011 0001 1000 1010

Note Except r = A.

Contents

Main Page IEBus is a trademark of NEC Corporation. NOTES FOR CMOS DEVICES 4 Regional Information NEC Electronics Hong Kong Ltd. Device availability Ordering information Product release schedule Page INTRODUCTION Page Page Page Page Page 1.7 Special Function Register (SFR) Area 1.8 External Memory Space 1.9 IEBusTM Register Area 14 CHAPTER 2 REGISTERS 2.1 Control Registers Page Figure 2-5. Data to Be Reset from Stack Memory 2.2 General-Purpose Registers CHAPTER 2 REGISTERS Figure 2-6. General-Purpose Register Configuration (a) Absolute names (b) Functional names 2.3 Special Function Registers (SFRs) 20 CHAPTER 3 ADDRESSING 3.1 Instruction Address Addressing Page Page Page 3.2 Operand Address Addressing Page Page Page Page Page Page Page 32 CHAPTER 4 INSTRUCTION SET 4.1 Operation Page Page CHAPTER 4 INSTRUCTION SET Note Except r = A. CHAPTER 4 INSTRUCTION SET Note Only when rp = BC, DE or HL. (2) 16-bit instructions MOVW, XCHW, ADDW, SUBW, CMPW, PUSH, POP, INCW, DECW (3) Bit manipulation instructions MOV1, AND1, OR1, XOR1, SET1, CLR1, NOT1, BT, BF, BTCLR Page 4.2 Instruction Codes 4.2.2 Instruction code list Notes 1. Only when rp = BC, DE or HL. 2. Except r = A. Page Page Page Page Page Page Page Page MOV XCH Page MOVW XCHW Page ADD ADDC SUB SUBC AND OR XOR CMP Page ADDW SUBW CMPW Page MULU DIVUW Page INC DEC INCW DECW Page ROR ROL RORC ROLC ROR4 ROL4 Page ADJBA ADJBS Page MOV1 AND1 OR1 XOR1 SET1 CLR1 NOT1 Page CALL CALLF CALLT BRK RET RETI RETB Page PUSH POP MOVW SP , src MOVW AX, SP Page BR Page BC BNC BZ BNZ BT BF BTCLR DBNZ Page SEL RBn NOP EI DI HALT STOP APPENDIX A REVISION HISTORY 124 APPENDIX B INSTRUCTION INDEX (MNEMONIC: BY FUNCTION) Page 126 APPENDIX C INSTRUCTION INDEX (MNEMONIC: IN ALPHABETICAL ORDER) Page Page Facsimile Message Thank you for your kind support. From: