NEC 78K/0 Series APPENDIX A REVISION HISTORY

123

User's Manual U12326EJ4V0UM

APPENDIX A REVISION HISTORY

The following table shows the revision history of the previous editions. The “Applied to:” column indicates the

chapters of each edition in which the revision was applied.

Edition Major Revision from Previous Edition Applied to:

2nd Addition of the following versions: Throughout

µ

PD78055 and 78P058, and

µ

PD78018F, 78044A, 78054Y,

78078, 78083, 78098, and 780208 Subseries

Addition of the English documentation No. to the related documents INTRODUCTION

Addition of the IEBus register area (

µ

PD78098 Subseries only)

CHAPTER 1 MEMORY SPACE

Addition of the description of the number of clocks when the

CHAPTER 4 INSTRUCTION SET

external ROM contains the program to the clock column.

Addition of Notes to the description of the ROR4 and ROL4 CHAPTER 5 EXPLANATION

instructions in the rotate instruction. OF INSTRUCTIONS

Change of the operation of the ADJBA and ADJBS instructions

in the BCD adjust instruction.

3rd Addition of the following versions: Throughout

µ

PD78014H, 78018FY, 78044F, 78044H, 78058F, 78058FY,

78064Y, 78064B, 78075B, 78075BY, 78078Y, 78098B, 780018Y,

780024, 780024Y, 780034, 780034Y, 780058, 780058Y,

780228, 780308, 780308Y, 780924, and 780964 Subseries,

and

µ

PD78011F, 78012F, 78070A, 78070AY, 780001, 78P0914,

780206, and 780208

Deletion of the following versions

µ

PD78024, 78044, and 78044A Subseries

Addition of the table of all internal RAM spaces of each model CHAPTER 1 MEMORY SPACE

Change of the format of external memory space table

4th Deletion of all information except for information common to the Throughout

78K/0 Series (for individual product information, refer to the user’s

manual of each product).

Contents

Main Page IEBus is a trademark of NEC Corporation. NOTES FOR CMOS DEVICES 4 Regional Information NEC Electronics Hong Kong Ltd. Device availability Ordering information Product release schedule Page INTRODUCTION Page Page Page Page Page 1.7 Special Function Register (SFR) Area 1.8 External Memory Space 1.9 IEBusTM Register Area 14 CHAPTER 2 REGISTERS 2.1 Control Registers Page Figure 2-5. Data to Be Reset from Stack Memory 2.2 General-Purpose Registers CHAPTER 2 REGISTERS Figure 2-6. General-Purpose Register Configuration (a) Absolute names (b) Functional names 2.3 Special Function Registers (SFRs) 20 CHAPTER 3 ADDRESSING 3.1 Instruction Address Addressing Page Page Page 3.2 Operand Address Addressing Page Page Page Page Page Page Page 32 CHAPTER 4 INSTRUCTION SET 4.1 Operation Page Page CHAPTER 4 INSTRUCTION SET Note Except r = A. CHAPTER 4 INSTRUCTION SET Note Only when rp = BC, DE or HL. (2) 16-bit instructions MOVW, XCHW, ADDW, SUBW, CMPW, PUSH, POP, INCW, DECW (3) Bit manipulation instructions MOV1, AND1, OR1, XOR1, SET1, CLR1, NOT1, BT, BF, BTCLR Page 4.2 Instruction Codes 4.2.2 Instruction code list Notes 1. Only when rp = BC, DE or HL. 2. Except r = A. Page Page Page Page Page Page Page Page MOV XCH Page MOVW XCHW Page ADD ADDC SUB SUBC AND OR XOR CMP Page ADDW SUBW CMPW Page MULU DIVUW Page INC DEC INCW DECW Page ROR ROL RORC ROLC ROR4 ROL4 Page ADJBA ADJBS Page MOV1 AND1 OR1 XOR1 SET1 CLR1 NOT1 Page CALL CALLF CALLT BRK RET RETI RETB Page PUSH POP MOVW SP , src MOVW AX, SP Page BR Page BC BNC BZ BNZ BT BF BTCLR DBNZ Page SEL RBn NOP EI DI HALT STOP APPENDIX A REVISION HISTORY 124 APPENDIX B INSTRUCTION INDEX (MNEMONIC: BY FUNCTION) Page 126 APPENDIX C INSTRUCTION INDEX (MNEMONIC: IN ALPHABETICAL ORDER) Page Page Facsimile Message Thank you for your kind support. From: