CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
161
Users Manual U10676EJ3V0UM
Figure 6-44. Setting of Timer Counter Mode Register (n = 1, 2)
TM20TM21TM23 TM22TM24TM25TM26TM2
F90H
TMn3 Clears counter and IRQTn flag when "1" is written. Starts count operation
if bit 2 is set to "1".
Timer start command bit
Operation mode
TMn2
0
1
Stops (count value retained)
Count operation
Count operation
Count pulse (CP) select bit
TMn6 TM1
TMn5
0Carrier clock input
1
fX/25
10
01
1fX/210
0
fX/28
fX/212
TMn4
0
1
0
1
110
fX/26
111
Operation mode select bit
TM21
1 Carrier generator mode
ModeTM20
1
76543210
TM10TM11TM13 TM12TM14TM15TM16
Address
TM1
FA8H
Symbol
TM2
fX/2
fX
fX/28
fX/26
fX/210
fX/24
TM11
0
TM10
0
Setting prohibited
Other
Remark n = 1, 2