80 User’s Manual U10676EJ3V0UM
CHAPTER 5 EEPROM
The
µ
PD754244 incorporates not only a 128-word × 4-bit static RAM but also a 16-word × 8-bit EEPROM
(Electrically Erasable PROM) as data memory.
EEPROM, unlike static RAM, can retain its contents when the power is turned off.
Unlike EPROM, contents can electrically be erased without using ultraviolet rays.
It is, therefore, suitable for application fields such as keyless entry and as a data carrier.
EEPROM is mapped onto memory bank 4 of the data memory. EEPROM is manipulated by an 8-bit memory
manipulation instruction.
5.1 EEPROM Configuration
EEPROM consists of the EEPROM main unit at memory bank 4 of the data memory and the EEPROM control
block.
The EEPROM control block consists of an EEPROM write control register (EWC) that controls manipulation of
EEPROM and a block that detects write completion and generates an interrupt signal.
5.2 EEPROM Features
(1) Once data is written to EEPROM, it can retain the contents, even if the power is turned off.
(2) As with the static RAM, manipulation (automatic erasure/automatic writing) is possible using an 8-bit memory
manipulation instruction.
However, there are restrictions on the instructions that can be executed. Refer to 5.5.1 EEPROM manipu-
lation instructions.
(3) EEPROM performs automatic erasure/automatic writing within the time set by the dedicated EEPROM write
timer clock selection bit (EWTC). Therefore, the load on the software that controls the write time can be
alleviated.
• Write time ··· Set EWTC4 to EWTC6 so that the write time is as follows.
With
µ
PD754144 ··· 18 × 28/fCC (4.6 ms: fCC = 1.0 MHz)
With
µ
PD754244 ··· 4.0 ms MIN., 10.0 ms MAX.
Clear the EEPROM write enable/disable control bit (EWE) to 0 after writing.
Any instruction other than one related to EEPROM writing can be executed even in an EEPROM write
operation.
• Number of writes
TA = –40 to +70°C ··· 100,000 times/byte
TA = –40 to +85°C ··· 80,000 times/byte
(4) When writing is completed, an EEPROM write end interrupt is generated.
(5) EEPROM can independently check whether writing is possible or not using the write status flag. A bit
manipulation instruction is used for this check (refer to 5.3 EEPROM Write Control Register (EWC).