CHAPTER 11 INSTRUCTION SET
247
User’s Manual U10676EJ3V0UM
Machine
Cycle
Instructions Mnemonic Operand Bytes Operation Skip Condition
Addressing
Area
Subrou-
tine/stack
control
Interrupt
control
PUSH rp 1 1
(SP – 1) (SP – 2) rp, SP SP – 2
BS 2 2
(SP – 1) MBS, (SP – 2) RBS, SP SP–2
POP rp 1 1 rp (SP + 1) (SP), SP SP + 2
BS 2 2
MBS (SP + 1), RBS (SP), SP SP + 2
EI 2 2 IME (IPS.3) 1
IE××× 22IE××× 1
DI 2 2 IME (IPS.3) 0
IE××× 22IE××× 0
I/O INNote1 A, PORTn22A PORTn(n = 3, 6, 7, 8)
OUTNote1 PORTn, A 2 2 PORTn A (n = 3, 6, 8)
CPU control HALT 2 2 Set HALT Mode (PCC.2 1)
STOP 2 2 Set STOP Mode (PCC.3 1)
NOP 1 1 No Operation
Special SEL RBn 2 2 RBS n (n = 0-3)
MBn 2 2 MBS n (n = 0, 4, 15)
GETI
Note2, 3
taddr 1 3 .TBR instruction *10
PC11-0 (taddr)3-0 + (taddr+1)
.TCALL instruction
(SP–4) (SP–1) (SP–2) PC11-0
(SP–3) MBE, RBE, 0, 0
PC11-0 (taddr)3-0 + (taddr+1)
SP SP–4
. Other than TBR and TCALL
instructions
Executes instruction of (taddr)
(taddr+1)
13.TBR instruction
PC11-0 (taddr)3-0 + (taddr+1)
4.TCALL instruction
(SP–6) (SP–3) (SP–4) PC11-0
(SP–5) 0, 0, 0, 0
(SP–2) ×, ×, MBE, RBE
PC11-0 (taddr)3-0 + (taddr+1)
SP SP-6
3.Other than TBR and TCALL
instructions
Executes instruction of (taddr) (taddr+1)
Notes 1. To execute an IN/OUT instruction, it is necessary that MBE = 0 or MBE = 1, MBS = 15.2. The shaded portion is supported only in the MkII mode. All others are supported only in the MkI mode.3. The TBR and TCALL instructions are the assembler directives for table definition.
Depends on
referenced
instruction
Depends on
referenced
instruction