259

CHAPTER 13 BUZZER OUTPUT CONTROL CIRCUIT

TCL27
7
TCL26
6
TCL25TCL24
4
0
3210
FF42H
Address
TCL2
Symbol
TCL22TCL21 TCL20
5
00H
After
Reset
R/W
R/W
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
TCL22TCL21 TCL20
fXX/23
fXX/24
fXX/25
fXX/26
fXX/27
fXX/28
fXX/29
fXX/211
fX/23
fX/24
fX/25
fX/26
fX/27
fX/28
fX/29
fX/211
fX/24
fX/25
fX/26
fX/27
fX/28
fX/29
fX/210
fX/212
Watchdog Timer Count Clock Selection
0
1
TCL24
fXX/27
fXT (32.768 kHz)
fX/27 (39.1 kHz) fX/28 (19.5 kHz)
Watch Timer Count Clock Selection
0
1
1
1
1
×
0
0
1
1
×
0
1
0
1
TCL27TCL26 TCL25
Buzzer output disable
fXX/29
fXX/210
fXX/211
Setting prohibited
fX/29 (9.8 kHz)
fX/210 (4.9 kHz)
fX/211 (2.4 kHz)
fX/210 (4.9 kHz)
fX/211 (2.4 kHz)
fX/212 (1.2 kHz)
Buzzer Output Frequency Selection
(625 kHz)
(313 kHz)
(156 kHz)
(78.1 kHz)
(39.1 kHz)
(19.5 kHz)
(9.8 kHz)
(2.4 kHz)
(313 kHz)
(156 kHz)
(78.1 kHz)
(39.1 kHz)
(19.5 kHz)
(9.8 kHz)
(4.9 kHz)
(1.2 kHz)
MCS = 1 MCS = 0
MCS = 1 MCS = 0
MCS = 1 MCS = 0
Figure 13-2. Timer Clock Select Register 2 Format
Caution When rewriting TCL2 to other data, stop the timer operation beforehand.
Remarks 1. fXX : Main system clock frequency (fX or fX/2)
2. fX: Main system clock oscillation frequency
3. fXT : Subsystem clock oscillation frequency
4. ×: don't care
5. MCS : Bit 0 of oscillation mode selection register (OSMS)
6. Figures in parentheses apply to operation with fX = 5.0 MHz or fXT = 32.768 kHz.