NEC - page 516

516
CHAPTER 23 STANDBY FUNCTION
STOP Mode Clear
X1 Pin
Voltage
Waveform
V
SS
a
23.1.2 Standby function control register
A wait time after the STOP mode is cleared upon interrupt request till the oscillation stabilizes is controlled with
the oscillation stabilization time select register (OSTS).
OSTS is set with an 8-bit memory manipulation instruction.
RESET input sets OSTS to 04H. However, it takes 217/fX, not 218/fX, until the STOP mode is cleared by RESET
input.
Figure 23-1. Oscillation Stabilization Time Select Register Format
Caution The wait time when clearing the STOP mode does not include the time until clock oscillation
starts after the STOP mode is cleared (“a” in the figure below). This applies to STOP mode
clearance by RESET input as well as STOP mode clearance by interrupt request generation.
Remarks 1. fXX :Main system clock frequency (fX or fX/2)
2. fX:Main system clock oscillation frequency
3. MCS :Bit 0 of oscillation mode select register (OSMS)
4. Values in parentheses apply to operating at fX = 5.0 MHz
Address
FFFAH 04H
After
Reset R/W
R/W
0
0
0
0
1
Selection of Oscillation Stabilization
Time when STOP Mode is Released
2
12
/f xx
2
14
/f xx
2
15
/f xx
2
16
/f xx
2
17
/f xx
OSTS2
7
0
Symbol
OSTS
6
0
5
0
4
0
3
0
2
OSTS2
1
OSTS1
0
OSTS0
0
0
1
1
0
Other than above
OSTS1
MCS = 1 MCS = 0
2
12
/f x (819 s)
2
14
/f x (3.28 ms)
2
15
/f x (6.55 ms)
2
16
/f x (13.1 ms)
2
17
/f x (26.2 ms)
2
13
/f x (1.64 ms)
2
15
/f x (6.55 ms)
2
16
/f x (13.1 ms)
2
17
/f x (26.2 ms)
2
18
/f x (52.4 ms)
µ 0
1
0
1
0
OSTS0
Setting prohibited