512
CHAPTER 22 EXTERNAL DEVICE EXPANSION FUNCTION
ASTB
RD
Lower Address
Read DataAD0 to AD7
A8 to A15 Higher Address
WAIT
ASTB
RD
AD0 to AD7
A8 to A15
Lower Address
Read Data
Higher Address
Internal Wait Signal
(1-clock wait)
Higher Address
ASTB
RD
AD0 to AD7
A8 to A15
Lower Address
Read Data
Figure 22-5. External Memory Read Timing
(a) No wait (PW1, PW0 = 0, 0) setting
(b) Wait (PW1, PW0 = 0, 1) setting
(c) External wait (PW1, PW0 = 1, 1) setting