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LIST OF FIGURES (3/8)Figure No. Title Page
8-31 Control Register Settings for One-Shot Pulse Output Operation Using Software Trigger................ 204
8-32 Timing of One-Shot Pulse Output Operation Using Software Trigger............................................... 205
8-33 Control Register Settings for One-Shot Pulse Output Operation Using External Trigger................. 206
8-34 Timing of One-Shot Pulse Output Operation Using External Trigger (with Rising Edge Specified).. 207
8-35 16-Bit Timer Register Start Timing.................................................................................................... 208
8-36 Timings After Change of Compare Register during Timer Count Operation..................................... 208
8-37 Capture Register Data Retention Timing.......................................................................................... 209
8-38 Operation Timing of OVF0 Flag........................................................................................................ 210
9-1 8-Bit Timer/Event Counter Block Diagram........................................................................................ 217
9-2 Block Diagram of 8-Bit Timer/Event Counter Output Control Circuit 1 ............................................. 218
9-3 Block Diagram of 8-Bit Timer/Event Counter Output Control Circuit 2 ............................................. 218
9-4 Timer Clock Select Register 1 Format.............................................................................................. 221
9-5 8-Bit Timer Mode Control Register Format....................................................................................... 222
9-6 8-Bit Timer Output Control Register Format ..................................................................................... 223
9-7 Port Mode Register 3 Format ........................................................................................................... 224
9-8 Interval Timer Operation Timings...................................................................................................... 225
9-9 External Event Counter Operation Timings (with Rising Edge Specified) ........................................ 228
9-10 Square-Wave Output Operation Timing............................................................................................ 230
9-11 Interval Timer Operation Timing........................................................................................................ 231
9-12 External Event Counter Operation Timings (with Rising Edge Specified) ........................................ 233
9-13 Square-Wave Output Operation Timing............................................................................................ 235
9-14 8-Bit Timer Registers Start Timing.................................................................................................... 236
9-15 Event Counter Operation Timing ...................................................................................................... 236
9-16 Timing After Compare Register Change During Timer Count Operation.......................................... 237
10-1 Watch Timer Block Diagram ............................................................................................................. 241
10-2 Timer Clock Select Register 2 Format.............................................................................................. 242
10-3 Watch Timer Mode Control Register Format .................................................................................... 243
11-1 Watchdog Timer Block Diagram ....................................................................................................... 247
11-2 Timer Clock Select Register 2 Format.............................................................................................. 249
11-3 Watchdog Timer Mode Register Format........................................................................................... 250
12-1 Remote Controlled Output Application Example............................................................................... 253
12-2 Clock Output Control Circuit Block Diagram..................................................................................... 254
12-3 Timer Clock Select Register 0 Format.............................................................................................. 255
12-4 Port Mode Register 3 Format ........................................................................................................... 256
13-1 Buzzer Output Control Circuit Block Diagram................................................................................... 257
13-2 Timer Clock Select Register 2 Format.............................................................................................. 259
13-3 Port Mode Register 3 Format ........................................................................................................... 260