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CHAPTER 9 8-BIT TIMER/EVENT COUNTERS
TCL17TCL16 TCL15 TCL14 TCL13 TCL12 TCL11TCL10
76543210Symbol
TCL1 FF41H 00H R/W
Address After Reset R/W
TCL13TCL12 TCL11 TCL10
0 0 0 0 TI1 falling edge
0 0 0 1 TI1 rising edge
0110
0111
f
XX/2 fX/2 (2.5 MHz) fX/22(1.25 MHz)
1000
f
XX/22fX/22 (1.25 MHz) fX/23(625 kHz)
1001
f
XX/23fX/23(625 kHz) fX/24(313 kHz)
1010
f
XX/24fX/24(313 kHz) fX/25(156 kHz)
1011
f
XX/25fX/25(156 kHz) fX/26(78.1 kHz)
1100
f
XX/26fX/26(78.1 kHz) fX/27(39.1 kHz)
1101
f
XX/27fX/27(39.1 kHz) fX/28(19.5 kHz)
1110
f
XX/28fX/28(19.5 kHz) fX/29(9.8 kHz)
1111
f
XX/29fX/29(9.8 kHz) fX/210 (4.9 kHz)
MCS = 1
8-Bit Timer Register 1 Count Clock Selection
MCS = 0
Other than above Setting prohibited
fXX/211 fX/211 (2.4 kHz) fX/212 (1.2 kHz)
TCL17TCL16 TCL15 TCL14
0 0 0 0 TI2 falling edge
0 0 0 1 TI2 rising edge
0110
0111
f
XX/2 fX/2 (2.5 MHz) fX/22(1.25 MHz)
1000
f
XX/22fX/22 (1.25 MHz) fX/23(625 kHz)
1001
f
XX/23fX/23(625 kHz) fX/24(313 kHz)
1010
f
XX/24fX/24(313 kHz) fX/25(156 kHz)
1011
f
XX/25fX/25(156 kHz) fX/26(78.1 kHz)
1100
f
XX/26fX/26(78.1 kHz) fX/27(39.1 kHz)
1101
f
XX/27fX/27(39.1 kHz) fX/28(19.5 kHz)
1110
f
XX/28fX/28(19.5 kHz) fX/29(9.8 kHz)
1111
f
XX/29fX/29(9.8 kHz) fX/210 (4.9 kHz)
MCS = 1
8-Bit Timer Register 2 Count Clock Selection
MCS = 0
Other than above Setting prohibited
fXX/211 fX/211 (2.4 kHz) fX/212 (1.2 kHz)
Figure 9-4. Timer Clock Select Register 1 FormatCaution When rewriting TCL1 to other data, stop the timer operation beforehand.
Remarks 1. fXX : Main system clock frequency (fX or fX/2)
2. fX: Main system clock oscillation frequency
3. TI1 : 8-bit timer register 1 input pin4. TI2 : 8-bit timer register 2 input pin
5. MCS : Bit 0 of oscillation mode selection register (OSMS)
6. Figures in parentheses apply to operation with fX = 5.0 MHz