68-Pin SCSI Type III Pinout
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| Standard |
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Pin | Signal | Description / Comments | Pin | Signal |
| Description / Comments | |||||
1 | DACLKIN/ |
| External DAC Clock In or | 35 | DGND |
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| Digital Ground |
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| CNTR1 |
| Counter 1. | Rising or Falling |
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| See Pin 39 | [Note | Edge Sensitive. |
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| 4] |
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2 | ADCLKIN |
| External ADC Clock In | 36 | DGND |
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| Digital Ground |
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| See Pin 5 | [Note 3] |
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3 | ADTRGOUT/ | Internal ADC Trigger Output/ | 37 | ADCLKOUT/ |
| Internal ADC Clock Output/ |
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| TMR0 |
| Timer 0 Clock Output |
| TMR1 |
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| Timer 1 Clock Output |
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4 |
| Reserved |
| 38 | DATRGIN |
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| DAC0 External Gate |
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| (Level Controlled), or |
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| External Trigger (Edge Active). |
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5 | ADCLKIN |
| External ADC Clock In | 39 | DACLKIN/ |
| External DAC Clock In, or |
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| See Pin 2 | [Note 3] |
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| CNTR1 |
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| Counter 1. | Rising or Falling |
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| See Pin 1 | [Note 4] | Edge Sensitive. |
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6 | ADTRGIN |
| ADC Trigger | 40 | DGND |
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| Digital Ground |
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7 | C6 |
| TTL Level Digital I/O Ch. C6 | 41 | C7 |
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| TTL Level Digital I/O Ch. C7 |
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8 | C4 | D | TTL Level Digital I/O Ch. C4 | 42 | C5 |
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| TTL Level Digital I/O Ch. C5 | D | ||
9 | C2 | I | TTL Level Digital I/O Ch. C2 | 43 | C3 |
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| TTL Level Digital I/O Ch. C3 | I | ||
10 | C0 | G | TTL Level Digital I/O Ch. C0 | 44 | C1 |
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| TTL Level Digital I/O Ch. C1 | G | ||
11 | B6 | I | TTL Level Digital I/O Ch. B6 | 45 | B7 |
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| TTL Level Digital I/O Ch. B7 | I | ||
12 | B4 | T | TTL Level Digital I/O Ch. B4 | 46 | B5 |
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| TTL Level Digital I/O Ch. B5 | T | ||
13 | B2 | A | TTL Level Digital I/O Ch. B2 | 47 | B3 |
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| TTL Level Digital I/O Ch. B3 | A | ||
14 | B0 | L | TTL Level Digital I/O Ch. B0 | 48 | B1 |
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| TTL Level Digital I/O Ch. B1 | L | ||
15 | A6 |
| TTL Level Digital I/O Ch. A6 | 49 | A7 |
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| TTL Level Digital I/O Ch. A7 |
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16 | A4 | I | TTL Level Digital I/O Ch. A4 | 50 | A5 |
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| TTL Level Digital I/O Ch. A5 | I | ||
17 | A2 | O | TTL Level Digital I/O Ch. A2 | 51 | A3 |
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| TTL Level Digital I/O Ch. A3 | O | ||
18 | A0 |
| TTL Level Digital I/O Ch. A0 | 52 | A1 |
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| TTL Level Digital I/O Ch. A1 |
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19 | +5 VDC |
| Power |
| 53 | DGND |
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| Digital Ground |
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20 | ARET 1 | [Note 2] | Analog Return 1 | 54 | ARET 0 | [Note 2] | Analog Return 0 |
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21 | AOUT 1 | [Note 2] | DAC1, Analog Out 1 | 55 | AGND |
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| Analog Ground |
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22 | AOUT 0 | [Note 2] | DAC0, Analog Out 0 | 56 | AGND |
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| Analog Ground |
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ANALOG INPUTS | For Single Ended | For Differential | ANALOG INPUTS |
| For Single Ended | For Differential | |||||
23 | AIN 15 |
| Ch. 15 | Ch. 7 Lo | 57 | AIN 7 |
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| Ch. 7 | Ch. 3 Lo |
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24 | AGND | Analog Ground | Analog Ground | 58 | AIN 14 |
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| Ch. 14 | Ch. 7 Hi (+) |
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25 | AIN 6 |
| Ch. 6 | Ch. 3 Hi (+) | 59 | AGND |
| Analog Ground | Analog Ground | ||
26 | AIN 13 |
| Ch. 13 | Ch. 6 Lo | 60 | AIN 5 |
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| Ch. 5 | Ch. 2 Lo |
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27 | AGND | Analog Ground | Analog Ground | 61 | AIN 12 |
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| Ch. 12 | Ch. 6 Hi (+) |
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28 | AIN 4 |
| Ch. 4 | Ch. 2 Hi (+) | 62 | SGND |
| Signal Ground | Signal Ground |
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29 | AGND | Analog Ground | Analog Ground | 63 | AIN 11 |
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| Ch. 11 | Ch. 5 Lo |
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30 | AIN 3 |
| Ch. 3 | Ch. 1 Lo | 64 | AGND |
| Analog Ground | Analog Ground | ||
31 | AIN 10 |
| Ch. 10 | Ch. 5 Hi (+) | 65 | AIN 2 |
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| Ch. 2 | Ch. 1 Hi (+) |
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32 | AGND | Analog Ground | Analog Ground | 66 | AIN 9 |
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| Ch. 9 | Ch. 4 Lo |
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33 | AIN 1 |
| Ch. 1 | Ch. 0 Lo | 67 | AGND |
| Analog Ground | Analog Ground | ||
34 | AIN 8 |
| Ch. 8 | Ch. 4 Hi (+) | 68 | AIN 0 |
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| Ch. 0 | Ch. 0 Hi (+) |
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Notes to this table appear on the following page.
887293 | DaqBoard/500 Series User’s Manual |
