DACLKIN/CNTR1 – Uses pin # 1 or pin # 39 for one of the following two functions.
DACLKIN is the External DAC Pacer clock input. This input recognizes TTL level signals and is edge sensitive. The active edge is selectable as either rising or falling.
CNTR1 is the general purpose Counter 1 clock input. This input recognizes TTL level signals and is rising edge sensitive. The input clock rate cannot exceed 500 kHz. The clock source must provide a minimum pulse width of 100 ns.
The DACLKIN signal line is shared with the
Only one input signal may be connected to the DACLKIN/CNTR1 pin (or associated terminal) at any given time; and the signal can only be connected to pin # 1 or pin # 39, NOT both.
Attempting to use COUNTER 1 when the DAC Pacer Clock Source is set for an External
Clock Input would not be possible unless COUNTER 1 was being used to count the DAC’s
External Clock Input signal.
DATRGIN – Uses pin # 38. DATGRIN is the External DAC0 Trigger/Gate Input. This input recognizes TTL level signals and is used to start or stop the DAC acquisition process. The input is selectable as either rising/falling active edge or active high/low level sensitivity.
Ground Lines
SGND - This signal is the reference ground used for A/D conversions. If you are measuring from a fully floating source in differential mode, it would be beneficial to tie one of the channel inputs to this point. This signal should not be used for sinking large amounts of current. This signal also acts as the common reference line when the board is configured for
AGND - This signal can be used just like SGND. In some environments AGND can also be used for tying cable shields to reduce analog noise.
DGND - This signal is the +5 V power return line. It is generally noisier than AGND and is a good logic low reference point.
Power Line
+5 V
This signal is sourced directly from the PCI Bus. These lines are fused @ 1 Amp.
DaqBoard/500 Series User’s Manual | 887293 | Connections & Pinouts |
