2.8 D/A Conversion
The
zD/A output register, BASE+4/BASE+5/BASE+6/BASE+7 (sec. 2.4.3).
zJP1/JP2 selects internal/external reference voltage (sec. 2.4.1).
NOTE: The DA output latch registers are designed as a “double buffered” structure. The
user must send the low byte data first, then send the high byte data to store the DA
data, then the low byte data will be still the previous value. Also, if the user sends high byte first then sends low byte, the low byte data of DA is still held in the previous one.
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