Panasonic KX-P7105, KX-P7110 manual IC1

KX-P7105 / KX-P7110

IC1

Pin	Symbol	In/Out	Function	Pin	Symbol	In/Out	Function
No.				No.
Y10	TMS	In	Boundary Scan Mode	R3	TMC1	In	Test Control Input
Y11	TDI	In	Boundary Scan Data Input	T3	DDO	Out	RCU Data Output
Y12	nPRDY	In	Printer Engine Ready	U3	GNDA9	-	Ground
Y13	CXD	Out	Command Data	V3	DBIN	In	RCU Interrupt
Y14	nCBSY	Out	Command Data Busy	V4	nPIFACK	Out	Parallel I/F Acknowledge
Y15	PIFDIR	Out	Parallel I/F Data Buffer Direction	V5	nPIFINIT	In	Parallel I/FInitialize
Y16	nRDYLED	Out	Ready LED ON/OFF	V6	PIFDATA[4]	In/Out	Parallel I/F Data 4
Y17	EEPDATA	In/Out	EEPROM Data	V7	PIFDATA[0]	In/Out	Parallel I/F Data 0
Y18	SDMD[15]	In/Out	SDRAM Data 15	V8	PIFDATA[3]	In/Out	Parallel I/F Data 3
Y19	SDMD[1]	In/Out	SDRAM Data 1	V9	SXD	In	Status Data
Y20	SDMD[0]	In/Out	SDRAM Data 0	V10	TRST	In	Boundary Scan Test Reset
W20	SDMD[2]	In/Out	SDRAM Data 2	V11	PIFHD	Out	Parallel I/F High Drive
V20	SDMD[3]	In/Out	SDRAM Data 3	V12	VCCA8	-	+3.3V
U20	SDMD[5]	In/Out	SDRAM Data 5	V13	nPRINT	Out	Print Page
T20	GNDA8	-	Ground	V14	nKEY	In	Key Sence
R20	SDMD[7]	In/Out	SDRAM Data 7	V15	nERRLED	Out	Error LED ON/OFF
P20	SDCLK	Out	SDRAM Clock	V16	GNDA10	-	Ground
N20	SDRAS	Out	SDRAM Row Address Strobe	V17	SDMD[12]	In/Out	SDRAM Data 12
M20	VDDA2	-	+2.5V	V18	SDMD[11]	In/Out	SDRAM Data 11
L20	SDBA[0]	Out	SDRAM Bank Address 0	U18	VCCA7	-	+3.3V
K20	SDMA[10]	Out	SDRAM Address 10	T18	SDMD[9]	In/Out	SDRAM Data 9
J20	SDMA[0]	Out	SDRAM Address 0	R18	SDDQM[1]	Out	SDRAM Data Mask 1
H20	SDMA[1]	Out	SDRAM Address 1	P18	SDWE	Out	SDRAM Write Enable
G20	SDMA[2]	Out	SDRAM Address 2	N18	nSDCS[1]	Out	SDRAM Chip Select 1
F20	SDMA[3]	Out	SDRAM Address 3	M18	SDCKE	Out	SDRAM Clock Enable
E20	FRDATA[5]	In/Out	Flash/Mask ROM Data 5	L18	SDMA[9]	Out	SDRAM Address 9
D20	FRDATA[2]	In/Out	Flash/Mask ROM Data 2	K18	SDMA[7]	Out	SDRAM Address 7
C20	FRMA[17]	Out	Flash/Mask ROM Address 17	J18	VCCA3	-	+3.3V
B20	FRMA[14]	Out	Flash/Mask ROM Address 14	H18	SDMA[6]	Out	SDRAM Address 6
A20	FRMA[19]	Out	Flash/Mask ROM Address 19	G18	FRDATA[4]	In/Out	Flash/Mask ROM Data 4
A19	FRMA[16]	Out	Flash/Mask ROM Address 16	F18	FRDATA[6]	In/Out	Flash/Mask ROM Data 6
A18	FRMA[9]	Out	Flash/Mask ROM Address 9	E18	FRDATA[3]	In/Out	Flash/Mask ROM Data 3
A17	FRMA[13]	Out	Flash/Mask ROM Address 13	D18	FRMA[18]	Out	Flash/Mask ROM Address 18
A16	GNDA12	-	Ground	C18	FRDATA[0]	In/Out	Flash/Mask ROM Data 0
A15	FRMA[3]	Out	Flash/Mask ROM Address 3	C17	FRMA[12]	Out	Flash/Mask ROM Address 12
A14	FRMA[0]	Out	Flash/Mask ROM Address 0	C16	FRMA[7]	Out	Flash/Mask ROM Address 7
A13	nFROE	Out	Flash/Mask ROM Output Enable	C15	FRMA[5]	Out	Flash/Mask ROM Address 5
A12	CLK54IN	In	Engine Clock Input	C14	FRMA[2]	Out	Flash/Mask ROM Address 2
A11	PCIAD[2]	In/Out	PCI Address and Data 2	C13	nFRCS[1]	Out	Flash/Mask ROM Chip Select 1
A10	PCIAD[6]	In/Out	PCI Address and Data 6	C12	GNDA4	-	Ground
A9	nPCICBE[0]	In/Out	PCI Command and Byte Enable 0	C11	PCIAD[1]	In/Out	PCI Address and Data 1
A8	PCIAD[10]	In/Out	PCI Address and Data 10	C10	PCIAD[4]	In/Out	PCI Address and Data 4
A7	PCIAD[14]	In/Out	PCI Address and Data 14	C9	VCCA1	-	+3.3V
A6	PCIPAR	In/Out	PCI Parity	C8	PCIAD[8]	In/Out	PCI Address and Data 8
A5	nPCISTP	In/Out	PCI Stop	C7	PCIAD[12]	In/Out	PCI Address and Data 12
A4	nPCIRDY	In/Out	PCI Initiator Ready	C6	PCIAD[15]	In/Out	PCI Address and Data 15
A3	nPCICBE[2]	In/Out	PCI Command and Byte Enable 2	C5	nPCISERRZ	In	PCI System Error
A2	PCIAD[17]	In/Out	PCI Address and Data 17	C4	VDDA1	-	+2.5V
B2	PCICKOUT	Out	PCI Clock Output	D4	GND2	-	Ground
C2	PCIAD[16]	In/Out	PCI Address and Data 16	E4	VCC3	-	+3.3V
D2	PCIAD[20]	In/Out	PCI Address and Data 20	F4	VDD4	-	+2.5V
E2	PCIAD[23]	In/Out	PCI Address and Data 23	G4	nPCIDSEL	In/Out	PCI Device Select
F2	USBIEN	In	USB Enable	H4	GND6	-	Ground

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