SDI Technologies SDIO Card manual SPI and SD 1-bit Mode Interrupts

			©Copyright 2000-2007 SD Card Association
SDIO Simplified Specification Version 2.00
	5.3.2 Special Timing for CMD53 Multi-Block Read			25
6.	SDIO Card Internal Operation			26
6.1		Overview		26
6.2		Register Access Time		26
6.3		Interrupts		26
6.4		Suspend/Resume		27
6.5		Read Wait		27
6.6		CMD52 During Data Transfer		27
6.7		SDIO Fixed Internal Map		27
6.8		Common I/O Area (CIA)		28
6.9		Card Common Control Registers (CCCR)		28
6.10		Function Basic Registers (FBR)		35
6.11		Card Information Structure (CIS)		37
6.12		Multiple Function SDIO Cards		37
6.13		Setting Block Size with CMD53		37
6.14		Bus State Diagram		38
7.	Embedded I/O Code Storage Area (CSA)			39
7.1		CSA Access		39
7.2		CSA Data Format		39
8.	SDIO Interrupts			40
8.1		Interrupt Timing		40
	8.1.1 SPI and SD 1-bit Mode Interrupts			40
	8.1.2		SD 4-bit Mode	40
	8.1.3		Interrupt Period Definition	40
	8.1.4 Interrupt Period at the Data Block Gap in 4-bit SD Mode (Optional)			40
	8.1.5 Inhibited Interrupts (Removed Section)			40
	8.1.6 End of Interrupt Cycles			40
	8.1.7 Terminated Data Transfer Interrupt Cycle			41
	8.1.8		Interrupt Clear Timing	41
9.	SDIO Suspend/Resume Operation			42
10.	SDIO Read Wait Operation			43
11.	Power Control			44
11.1		Power Control Overview		44
11.2		Power Control support for SDIO Cards		44
	11.2.1		Master Power Control	44
	11.2.2		Power Selection	45
	11.2.3		High-Power Tuples	45
11.3		Power Control Support for the SDIO Host		45
	11.3.1		Version 1.10 Host	45
	11.3.2		Power Control Operation	46
12.	High-Speed Mode			47
12.1		SDIO High-Speed Mode		47
12.2		Switching Bus Speed Mode in a Combo Card		47
13.	SDIO Physical Properties			48
13.1		SDIO Form Factors		48
13.2		Full-Size SDIO		48
13.3		miniSDIO		48
14.	SDIO Power			48
14.1		SDIO Card Initialization Voltages		48
14.2		SDIO Power Consumption		48
15.	Inrush Current Limiting			50
16.	CIS Formats			51
16.1		CIS Reference Document		51

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