SDI Technologies SDIO Card OCR Register, CID Register, CSD Register, RCA Register, DSR Register

©Copyright 2000-2007 SD Card Association

SDIO Simplified Specification Version 2.00

4.10.1OCR Register

All SD cards (memory, I/O and combo) shall have at least one OCR register. If the card is a combo card, it may have two OCR’s (one for memory and one for I/O). The memory portion of a combo card has an OCR accessed using ACMD41 and CMD58. The I/O portion of a card has an OCR with the same structure that is accessed via CMD5. If there are multiple OCR’s the voltage range may not be identical. Some I/O functions may have a wider VDD range than that reflected in the I/O OCR register. The I/O OCR shall be the logical AND of the voltage ranges(s) of all I/O functions. Note that the I/O OCR format is different from the memory version in that it is only 24 bits long. For details, see Table 3-1. The per-function voltage for each I/O function can be read in the CIS for the card.

4.10.2CID Register

There shall be a maximum of one CID register per SD card. If the card contains both memory and I/O, the CID register information is unchanged from the SD 1.01 version and reflects the information from the memory portion of the card. If the card is I/O only, the CID register and the associated access command (CMD10) are not supported. If the host attempts to access this register in an I/O only card, a card in SPI mode shall respond with an "Invalid Command" error response and a card in SD mode shall not respond.

4.10.3CSD Register

There shall be a maximum of one CSD register per SD card. If the card contains both memory and I/O, the CSD register information is unchanged from the SD 1.01 version and reflects the information from the memory portion of the card. If the card is I/O only, the CSD register and the associated access command (CMD9) are not supported. If the host attempts to access this register in an I/O only card, a card in SPI mode shall respond with an "Invalid Command" error response and a card in SD mode shall not respond.

4.10.4RCA Register

There shall only be one RCA register per SD card. The RCA value shall apply to the card as a whole. All functions and any memory share the same card address.

4.10.5DSR Register

SDIO only cards do not support the DSR register. In the case of combo cards, support is optional as defined in the SD Physical Specification.

4.10.6SCR Register

There shall be a maximum of one SCR register per SD card. If the card contains both memory and I/O, the SCR register information is unchanged from the SD 1.01 version and reflects the information from the memory portion of the card. If the card is I/O only, the SCR register and the associated access command (ACMD51) are not supported. If the host attempts to access this register in an I/O only card, a card in SPI mode shall respond with an "Invalid Command" error response and a card in SD mode shall not respond.

4.10.7SD Status

There shall be a maximum of one SD Status register per SD card. If the card contains both memory and I/O, the SD Status register information is unchanged from the SD 1.01 version and reflects the information from the memory portion of the card. If the card is I/O only, the SD Status register and the associated access command (ACMD13) are not supported. If the host attempts to access this register in an I/O only card, a card in SPI mode shall respond with an "Invalid Command" error response and a card in SD mode shall not respond.

4.10.8Card Status Register

The structure of the SDIO status register is shown in Table 4-7. For SDIO specific operations in the SD mode that return the card status register contents (i.e. the response to CMD7), some bits are not applicable to I/O operations and shall be returned as 0. These unused bits are identified as type N/A. For combo cards, the values returned shall reflect the memory status. The CURRENT_STATE bits (12:9) shall reflect the memory Controller State. For an I/O only card, the unused bits are 0 and the Current_State bits (12:9) shall be 0xF (15) to

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