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SLVP089 manual Printed in U.S.A, 07/98, SLVU001A
Models:
SLVP089
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Specifications
Schematic
Design Procedure
6. Power Switch Turn-On and Delay from Q2 Off
Mixed-Signal Linear Products
How to
Power Switch
Synchronous Switch and Rectifier
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Printed in U.S.A.
SLVU001A
07/98
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Contents
User’s Guide
ConSLVverterP089SynchronousEvaluationModuleBuck
Mixed-Signal Linear Products
1998
SLVU001A
Printed in U.S.A
07/98
SLVP089 Synchronous Buck Converter Evaluation Module User’s Guide
Literature Number SLVU001A July
IMPORTANT NOTICE
About This Manual
How to Use This Manual
Read This First
Related Documentation From Texas Instruments
Trademarks
If You Need Assistance
FCC Warning
2.1 Introduction 2.2 Operating Specifications 2.3 Design Procedures
Contents
1.1 Introduction 1.2 Schematic 1.3 Input/Output Connections
2.3.1 Duty Cycle Estimate 2.3.2 Output Filter 2.3.3 Power Switch
Figures
Tables
Page
Hardware
Chapter
Topic
1.1 Introduction
Figure 1-1. Typical Synchronous Buck Converter
Hardware
1.2 Schematic
Figure 1-2. Schematic Diagram
Schematic
Input/Output Connections
1.3 Input/Output Connections
Figure 1-3. Input/Output Connections
Board Layout
1.4 Board Layout
Figure 1-4. Board Layout
Hardware1-5
Bill of Materials
1.5 Bill of Materials
Table 1-1. Bill of Materials
Table 1-3. Load Regulation and Ripple, 3.3-V 9-V Input
1.6 Test Results
Table 1-2. Line/Load Regulation, 3.3-V Total Variation
Figure 1-5. Efficiency Vs Load
Test Results
Figure 1-6. Power Switch Turn-On and Delay from Q2 Off
Figure 1-7. Power Switch Turn-Off and Delay to Q2 On
V CC = 12
Hardware1-9
Figure 1-8. Inductor and Output Ripple
Test Results
2-AC
Page
Page
Design Procedure
Chapter
Topic
2.1 Introduction
Operating Specifications
2.2 Operating Specifications
Table 2-1. Operating Specifications
Design Procedure
2.3.1 Duty Cycle Estimate
2.3 Design Procedures
2.3.3 Power Switch
2.3.2 Output Filter
+ 3 W
2.3.4 Synchronous Switch and Rectifier
2.3.5 Snubber Network
1 mA
2.3.6 Controller Functions
2.3.7 Loop Compensation
0.001
Figure 2-1. Power Stage Bode Plot
+ DD V O
Figure 2-2. Compensation Network
Figure 2-3. Bode Plot
Figure 2-4. Output Response