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manual SLVP089 Synchronous Buck Converter Evaluation Module User’s Guide
Models:
SLVP089
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Specification
Schematic
Design Procedure
6. Power Switch Turn-On and Delay from Q2 Off
Mixed-Signal Linear Products
How to
Power Switch
Synchronous Switch and Rectifier
Page 3
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SLVP089 Synchronous Buck
Converter Evaluation Module
User’s Guide
Literature Number: SLVU001A
July 1998
Printed on Recycled Paper
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Page 4
Page 3
Image 3
Page 2
Page 4
Contents
1998
ConSLVverterP089SynchronousEvaluationModuleBuck
Mixed-Signal Linear Products
User’s Guide
Printed in U.S.A
07/98
SLVU001A
Literature Number SLVU001A July
SLVP089 Synchronous Buck Converter Evaluation Module User’s Guide
IMPORTANT NOTICE
Related Documentation From Texas Instruments
How to Use This Manual
Read This First
About This Manual
If You Need Assistance
FCC Warning
Trademarks
2.3.1 Duty Cycle Estimate 2.3.2 Output Filter 2.3.3 Power Switch
Contents
1.1 Introduction 1.2 Schematic 1.3 Input/Output Connections
2.1 Introduction 2.2 Operating Specifications 2.3 Design Procedures
Tables
Figures
Topic
Hardware
Chapter
Page
Figure 1-1. Typical Synchronous Buck Converter
1.1 Introduction
Schematic
1.2 Schematic
Figure 1-2. Schematic Diagram
Hardware
1.3 Input/Output Connections
Figure 1-3. Input/Output Connections
Input/Output Connections
Hardware1-5
1.4 Board Layout
Figure 1-4. Board Layout
Board Layout
1.5 Bill of Materials
Table 1-1. Bill of Materials
Bill of Materials
Figure 1-5. Efficiency Vs Load
1.6 Test Results
Table 1-2. Line/Load Regulation, 3.3-V Total Variation
Table 1-3. Load Regulation and Ripple, 3.3-V 9-V Input
V CC = 12
Figure 1-6. Power Switch Turn-On and Delay from Q2 Off
Figure 1-7. Power Switch Turn-Off and Delay to Q2 On
Test Results
2-AC
Figure 1-8. Inductor and Output Ripple
Test Results
Hardware1-9
Page
Topic
Design Procedure
Chapter
Page
2.1 Introduction
Design Procedure
2.2 Operating Specifications
Table 2-1. Operating Specifications
Operating Specifications
2.3.2 Output Filter
2.3 Design Procedures
2.3.3 Power Switch
2.3.1 Duty Cycle Estimate
2.3.4 Synchronous Switch and Rectifier
2.3.5 Snubber Network
+ 3 W
0.001
2.3.6 Controller Functions
2.3.7 Loop Compensation
1 mA
+ DD V O
Figure 2-1. Power Stage Bode Plot
Figure 2-2. Compensation Network
Figure 2-4. Output Response
Figure 2-3. Bode Plot