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Texas Instruments SLVP089 manual Design Procedure, Chapter, Page, Topic

Models: SLVP089

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Chapter 2

Design Procedure

There are many possible ways to proceed when designing power supplies. This chapter shows the procedure used in the design of the SLVP089. The chapter includes the following topics:

Topic		Page

2.1	Introduction	. . 2-2
2.2	Operating Specifications	. . 2-3
2.3	Design Procedures	. . 2-4

2-1

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Texas Instruments SLVP089 manual Design Procedure, Chapter, Page, Topic

Contents

1998 ConSLVverterP089SynchronousEvaluationModuleBuckMixed-Signal Linear Products User’s Guide07/98 Printed in U.S.ASLVU001A Literature Number SLVU001A July SLVP089 Synchronous Buck Converter Evaluation Module User’s GuideIMPORTANT NOTICE Related Documentation From Texas Instruments How to Use This ManualRead This First About This ManualFCC Warning If You Need AssistanceTrademarks 2.3.1 Duty Cycle Estimate 2.3.2 Output Filter 2.3.3 Power Switch Contents1.1 Introduction 1.2 Schematic 1.3 Input/Output Connections 2.1 Introduction 2.2 Operating Specifications 2.3 Design ProceduresTables FiguresTopic HardwareChapter PageFigure 1-1. Typical Synchronous Buck Converter 1.1 IntroductionSchematic 1.2 SchematicFigure 1-2. Schematic Diagram HardwareFigure 1-3. Input/Output Connections 1.3 Input/Output ConnectionsInput/Output Connections Hardware1-5 1.4 Board LayoutFigure 1-4. Board Layout Board LayoutTable 1-1. Bill of Materials 1.5 Bill of MaterialsBill of Materials Figure 1-5. Efficiency Vs Load 1.6 Test ResultsTable 1-2. Line/Load Regulation, 3.3-V Total Variation Table 1-3. Load Regulation and Ripple, 3.3-V 9-V InputV CC = 12 Figure 1-6. Power Switch Turn-On and Delay from Q2 OffFigure 1-7. Power Switch Turn-Off and Delay to Q2 On Test Results2-AC Figure 1-8. Inductor and Output RippleTest Results Hardware1-9Page Topic Design ProcedureChapter Page2.1 Introduction Design Procedure 2.2 Operating SpecificationsTable 2-1. Operating Specifications Operating Specifications2.3.2 Output Filter 2.3 Design Procedures2.3.3 Power Switch 2.3.1 Duty Cycle Estimate2.3.5 Snubber Network 2.3.4 Synchronous Switch and Rectifier+ 3 W 0.001 2.3.6 Controller Functions2.3.7 Loop Compensation 1 mA+ DD V O Figure 2-1. Power Stage Bode PlotFigure 2-2. Compensation Network Figure 2-4. Output Response Figure 2-3. Bode Plot