Registers
5.4Set Data Register (SET_DATA)
The GPIO set data register (SET_DATA) is shown in Figure 6 and described in Table 6. SET_DATA provides an alternate means of driving GPIO outputs high. Writing a 1 to a bit of SET_DATA sets the corresponding bit in OUT_DATA. Writing a 0 has no effect. Reading SET_DATA returns the contents of OUT_DATA.
Figure 6.  | Set Data Register (SET_DATA) | 
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31  | 
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  | Reserved  | 
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15  | 14  | 13  | 12  | 
  | 11  | 10  | 9  | 8  | 
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SET15  | SET14  | SET13  | SET12  | 
  | SET11  | SET10  | SET9  | SET8  | 
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7  | 6  | 5  | 4  | 
  | 3  | 2  | 1  | 0  | 
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SET7  | SET6  | SET5  | SET4  | 
  | SET3  | SET2  | SET1  | SET0  | 
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Legend: R = Read only; R/W = Read/Write;   | 
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Table 6.  | Set Data Register (SET_DATA) Field Descriptions | ||
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Bit  | Field  | Value  | Description | 
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31−16  | Reserved  | 0  | Reserved. The reserved bit location is always read as 0. A value written to  | 
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  | this field has no effect.  | 
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15−0  | SETn  | 
  | Writing 1 sets the corresponding bit the OUT_DATA register. Reading this  | 
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  | register returns the contents of the OUT_DATA register. Writing a 0 has no  | 
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  | effect.  | 
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  | 0  | No effect  | 
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  | 1  | Sets the corresponding bit in OUT_DATA  | 
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SPRU724 | 19  |