Registers
5.6Input Data Register (IN_DATA)
The GPIO input data register (IN_DATA) reflects the state of the GPIO pins. The IN_DATA register is shown in Figure 8 and described in Table 8. When read, IN_DATA returns the state of the GPIO pins regardless of the state of the corresponding bits in the DIR and OUT_DATA registers.
Figure 8.  | Input Data Register (IN_DATA)  | 
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31  | 
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  | Reserved  | 
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15  | 14  | 13  | 12  | 
  | 11  | 10  | 9  | 8  | 
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IN15  | IN14  | IN13  | IN12  | 
  | IN11  | IN10  | IN9  | IN8  | 
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7  | 6  | 5  | 4  | 
  | 3  | 2  | 1  | 0  | 
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IN7  | IN6  | IN5  | IN4  | 
  | IN3  | IN2  | IN1  | IN0  | 
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Legend: R = Read only; R/W = Read/Write;   | 
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Table 8.  | Input Data Register (IN_DATA) Field Descriptions | ||
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Bit  | Field  | Value  | Description | 
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31−16  | Reserved  | 0  | Reserved. The reserved bit location is always read as 0. A value written to  | 
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  | this field has no effect.  | 
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15−0  | INn  | 
  | Returns the status of the corresponding GPn pin.  | 
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SPRU724 | 21  |