Implementation and Simulation Scripts

R

simulation/timing

The timing directory contains timing simulation scripts provided with the core.

Table 4-9:Timing Directory

Name

Description

 

 

<project_dir>/<component_name>/simulation/timing

 

 

simulate_mti.do

ModelSim macro file that compiles the

 

post-par timing netlist and demo HDL

 

source. The script also loads and runs the

 

simulation for 8 μs. The implement script

 

must first be run to generate the post-par

 

timing simulation model. Simulation can

 

only be run after the timing simulation

 

model is generated.

 

 

wave_mti.do

ModelSim macro file that opens a wave

 

window and adds key signals to the wave

 

viewer. The wave_mti.do file is called by

 

the simulate_mti.do macro file.

 

 

simulate_ncsim.sh

Shell scripts that compile the functional

simulate_ncsim.bat

netlist and loopback HDL source. The

 

script also launches NCSIM and runs the

 

simulation for 8 μs.

 

 

wave_ncsim.sv

A NCSIM macro file that opens a wave

 

window and adds key signals to the wave

 

viewer. The wave_ncsim.sv file is called by

 

the simulate_ncsim.sh or

 

simulate_ncsim.bat file.

 

 

simulate_vcs.sh (verilog only)

Shell script that compiles the structural

 

netlist and example design. The script also

 

runs the functional simulation using VCS.

 

 

vcs_session.tcl (verilog only)

VCS tcl script that opens a wave window.

 

This macro is called by the simulate_vcs.sh

 

script.

 

 

vcs_commands.key (verilog only)

VCS command file. This file is called by the

 

simulate_vcs.sh script.

 

 

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Implementation and Simulation Scripts

The implementation script is either a shell script or a batch file that runs the example design through the Xilinx tool flow. The scripts are located in the following directory:

<proj_dir>/<component_name>/implement/

The implementation scripts are parameterized based on the Design Entry Tool and Design Entry Language CORE Generator project options. If either of these project options are changed, the core must be regenerated to create the appropriate implementation scripts.

SPI-4.2 v8.5 Getting Started Guide

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UG154 March 24, 2008

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Xilinx UG154 manual Implementation and Simulation Scripts, Simulation/timing, 9Timing Directory Name Description

UG154 specifications

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