Intel MCS-80/85 manual Driving the X1 and X2 Inputs

inter 8085AH/8085AH-2/8085AH-1

!

	INSIDE THE
EXTERNAL	8085AH
TRAP
INTERRUPT
REQUEST	TRAP
RESET IN		SCHMITT
		TRIGGER
			RESET
			+5V	D ClK
				D
				F/F
		INTERNAL		TRAP F.F.
		TRAP
		ACKNOWLEDGE

Parallel resonance at twice the clock frequency desired

CL (load capacitance) :0:::; 30 pF Cs (shunt capacitance) :0:::; 7 pF

Rs (equivalent shunt resistance) :0:::; 75 Ohms Drive level: 10 mW

Frequency tolerance: ± .005% (suggested)

Note the use of the 20 pF capacitor between X2 and ground. This capacitor is required with crystal fre- quencies below 4 MHz to assure oscillator startup at the correct frequency. A parallel-resonant LC circuit may be used as the frequency-determining network for the 8085AH, providing that its frequency tolerance of approximately ±10% is acceptable. The components are chosen from the formula:

II1.1

1\

Figure 4. TRAP and RESET IN Circuit f = ---- ! .. ----

The TRAP interrupt is special in that it disables inter- rupts, but preserves the previous interrupt enable status. Performing the first RIM instruction follow- ing a TRAP interrupt allows you to determine whether interrupts were enabled or disabled prior to the TRAP. All subsequent RIM instructions provide current interrupt enable status. Performing a RIM instruction following INTR, or RST 5.5-7.5 will provide current Interrupt Enable status, revealing that Interrupts are disabled. See the description of the RIM instruction in the MCS-80/85 Family User's Manual.

The serial I/O system is also controlled by the RIM and SIM instructions. SID is reaq by RIM, and SIM sets the SOD data.

DRIVING THE X1 AND X2 INPUTS

You may drive the clock inputs of the 8085AH, 8085AH-2, or 8085AH-1 with a crystal, an LC tuned circuit, an RC network, or an external clock source. The crystal frequency must be at least 1 MHz, and must be twice the desired internal clock frequency; hence, the 8085AH is operated with a 6 MHz crystal (for 3 MHz clock), the 8085AH-2 operated with a 10 MHz crystal (for 5 MHz clock), and the 8085AH-1 can be operated with a 12 MHz crystal (for 6 MHz clock). If a crystal is used, it must have the following characteristics:

To minimize variations in frequency, it is recom- mended that you choose a value for Cext that is at least twice that of Cinb or 30 pF. The use of an LC circuit is not recommended for frequencies higher than approximately 5 MHz.

An RC circuit may be used as the frequency- determining network forthe 8085AH if maintaining a precise clock frequency is of no importance. Var- iations in the on-chip timing generation can cause a wide variation in frequency when using the RC mode. Its advantage is its low component cost. The driving frequency generated by the circuit shown is approximately 3 MHz. It is not recommended that frequencies greatly higher or lower than this be attempted.

Figure 5 shows the recommended clock driver cir- cuits. Note in 0 and E that pullup resistors are re- quired to assure that the high level voltage of the input is at least 4V and maximum low level voltage of 0.8V.

For driving frequencies up to and including 6 MHz you may supply the driving signal to X1 and leave X2 open-circuited (Figure 50). If the driving frequency is from 6 MHz to 12 MHz, stability of the clock generator will be improved by d rivi ng both X1 and X2 with a push-pull source (Figure 5E). To, prevent self-oscillation of the 8085AH, be sure that X2 is not coupled back to X1 through the driving circuit.

6-14 AFN-01835C