THE INSTRUCTION SET

Ccondition addr (Condition call) If (CCC),

«SP) - 1) - (PCH) «SP) - 2) - (PCl) (SP) - (SP) - 2

(PC) - (byte 3) (byte 2)

If the specified condition is true, the ac- tions specified in the CAll instruction (see above) are performed; otherwise, control continues sequentially.

I

1

I.

11 1 C I C I C 11 0 0

low-order addr

high-order addr

Cycles: 2/5 (8085),315 (8080)

States: 9/18 (8085), 11/17 (8080)

immediatel Addressing: reg. indirect

Flags: none

RET(Return) (PCl) - «SP»; (PCH) - «SP) + 1); (SP) - (SP) + 2;

The content of the memory location whose address is specified in register SP is moved to the low-order eight bits of register PC. The content of the memory location whose address is one more than the content of register SP is moved to the high-order eight bits of register PC. The content of register SP is incremented by 2.

1 o o 1 o o 1

Cycles: 3

States: 10

Addressing: reg. indirect

Flags: none

Rcondition (Conditional return) If (CCC),

(PCl) - «SP» (PCH) - «SP) + 1) (SP) - (SP) + 2

If the specified condition is true, the ac- tions specified in the RET instruction (see above) are performed; otherwise, control continues sequentially.

1

1

C

C

C

o

o

o

 

 

 

 

 

 

 

 

 

 

 

 

Cycles:

1/3

 

 

 

 

 

 

 

States:

6/12 (8085),5/11 (8080)

 

 

 

Addressing:

reg. indirect

 

 

 

 

 

 

Flags:

none

 

 

 

 

RST n

 

(Restart)

 

 

 

 

 

 

«SP) - 1) - (PCH)

 

 

 

 

 

 

«SP)

-

2) -

(PCl)

 

 

 

 

 

 

(SP) -

(SP) -

2

 

 

 

 

 

 

(PC) -

8 * (NNN)

 

 

 

 

 

 

The high-order eight bits of the next in-

 

struction address are moved to the

 

memory location whose address is one

less than the content of register SP. The low-order eight bits of the next instruction address are moved to the memory location whose address is two less than the content of register SP. The content of register SP is decremented by two. Control is transferred to the instruction whose address is eight times the content of NNN.

1 1 N N N 1 1 1

Cycles: 3

States: 12 (8085), 11 (8080)

Addressing: reg. indirect

Flags: none

151413121110 9 8 7 6 5 4 3 2 1 0

JoJololoJoJoJoJOJOJOJNJNJNJOJOJOJ

Program Counter After Restart

*AII mnemonics copyrighted © Inte1 Corporation 1976.

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Intel MCS-80/85 manual Cycles 2/5 8085,315 States 9/18 8085, 11/17, «Sp

MCS-80/85 specifications

The Intel MCS-80/85 family, introduced in the late 1970s, is a seminal collection of microprocessors that played a pivotal role in the early days of computing. The MCS-80 series, initially targeting embedded systems and control applications, gained remarkable attention due to its innovative architecture and flexible programming capabilities.

The MCS-80 family is anchored by the 8080 microprocessor, which was one of the first fully integrated 8-bit microprocessors. Released in 1974, the 8080 operated at clock speeds ranging from 2 MHz to 3 MHz and featured a 16-bit address bus capable of addressing up to 64KB of memory. The processor’s instruction set included around 78 instructions, providing extensive capabilities for data manipulation, logic operations, and branching.

Complementing the 8080 was a suite of support chips, forming the MCS-80 platform. The most notable among them was the 8155, which integrated a static RAM, I/O ports, and a timer, tailored for ease of designing systems around the 8080. Other support chips included the 8085, which provided improvements with an integrated clock generator, making it compatible with more modern designs and applications.

The MCS-85 series, on the other hand, revolves around the 8085 microprocessor, which provided a more advanced architecture. The 8085 operated at clock speeds of up to 6 MHz and came with a 16-bit address bus, similar to its predecessor. However, it introduced more sophisticated features, including an enhanced instruction set and support for interrupt-driven programming. These enhancements made the 8085 especially appealing to developers working in real-time processing environments.

The MCS-80/85 family utilized NMOS technology, known for its lower power consumption and higher performance compared to previous technologies like TTL. The family’s architecture allowed for easy interfacing with a variety of peripherals, making it a favorite for educational institutions and hobbyists embarking on computer engineering projects.

With its robustness, versatility, and affordability, the Intel MCS-80/85 microprocessors laid the groundwork for many subsequent microcomputer systems and applications. The legacy of this powerful family continues to influence modern microprocessor design, emphasizing the importance of reliable architecture in a rapidly evolving technology landscape.