1

1

~:1...

CRT and Cassette Code (Cont'd)

ISIS- I I 8980.'OOSS

ASSEMBLER.

V1. 13

MOOULE

PAGE

;;

8985 SERIAL I/O HOTE APPENDJ:':

 

 

 

LOC

OSJ

SEO

SOURCE STATEMEm

 

 

08FF

(:9

2ea

RET

 

 

 

 

 

2139

 

 

 

 

0900 0EFA

9992 C01D99

9905 D2gee9 a90S 91)

9989 C29299

990C CD1589

egeF 71

99"19 2C

0911 C2OC99

9914 C9

2113

.: PLAYBK

 

~JAITS FOR THE LONG LEADER BURST TO ARRIVE, THEN CONTINUES

211

.;

 

READING BYTES FROM THE RECORDER ANCo STORING THE~l

212 ;

 

IN ~1Et~OPY STAIHINI3 AT LOCATION (HD.

213

.:

CONTINUES UNTIL

THE END OF

THE CURRENT PAGE (L>=0FFH) IS REACHED.

214

PLAYBK' r~vI

C'lDRCH~:

.: (LORCHf:'> SUCCESSIVE HIGHS tiUST BE REArl

215

PB1'

CAll

eITm

.: ". TO ',.'ERIFY THAT THE LEADER IS PRESENT

216

 

JNC

PLAYS~;

: .... AUf'ELECTRONICS HAS STABILIZE[;

217

 

DCR

C

 

 

218

 

JNZ

PSi

 

 

219 PB2:

CALL

TAPE! t-j:GET (:,ATA

B~'TE FRC*1 PECOF.HR

2213

 

MOl,!

M.. C

; STORE IN

"IH!OR'T'

221nIP L .: I~rpHl£NT PC!ir-ITER

.mz P82 .: REPER"r FOR REST OF CUf.:REm PAGE

223P.ET

 

225: TAPEIN CASSETTE TAPE INPUT SUBROUTINE. PEA[;'sONE 8'r'TEOF OATH

 

226

.:

FROM THE RECOP('ER INTERFACE flN(:'RETURNS ~HT~ THE BYTE IN REGISTER C.

13915 0609

227

TAPEIN:

~1IJr

8,9

.. RERn EIGHT OPTA ens

9917 1600

228

TIt:

N";'I

O.. 1313H.: CLEAR Uf':'[)I}JNC,JUNTEF.:

9919 15

229

TI2:

DCR

[0

. [ERH1ENT ceUNTER EACH TUIE ONE LEVEL IS REHfI

091A (:03009

2]13

 

CALL

BITIlj

 

9910 OA1909

211

 

.Ie

TI2; REPEPT IF STILL AT ONE LEVEL

ana CD3De9

232

 

CALL

BlrrN

 

9923 Cofl1909

233

 

JC

TI2

 

9926 14

2J4

TE.

iNR

[!

i HKRHIENT COIJNTEF.: EACH TINE ZERO IS READ

9927 CD3D09

2:'5

CALL

SITIN

 

092A D22699

236

 

JNC

TE

: REPEAT EACH nNE ZERO IS REACt

e92r, C03D09

237

 

CALL

BIT!N

 

9930 D22699

238

 

.JNC

TI3

 

9931. 7A

219

 

~10V

A, [!

 

9934 17

249

 

RAL

 

i t10YE COUNTER f'lOST SIGNIFICANT BIT INTO CARRY

9915 79

241

 

MOV

A., C

 

9936 1F

242

 

RAP .. MOVE [,ATA BIT FE I EVEC' (CY) INTO B'fiE REGISTER

9937 4F

243

 

MOV

C. A

 

9938 95

244

 

OCR

e

 

9939 C21709

245

 

.JNZ

TIl . : REPEAT UNTIL FULL Br'TE ASSEt-18LEr'

893C C9

246

 

RET

 

 

 

247

 

 

 

 

993D 1H6

248 BITW:

Mill

E! C~:RATE

 

093F 1D

249 SI1:

DCR

E

 

0949 C23F99

250mz

Bli: LINIT INPUT SAt-fLING RATE

8943 20

251

 

PJl1

 

: SANPLE SID LINE

8944 17

252

 

RAL

 

: ~10VE OATA INTO CY BIT

9945 C9

25:

 

RET

 

 

 

254

 

 

 

 

 

255

 

END

 

 

PUBLIC SYt1BOLS

A1·53

Page 193 Page 195
Page 194
Image 194
Intel MCS-80/85 manual 0911 C2OC99 9914 C9, RERn Eight Opta ens, TI2, TIl . Repeat Until Full BrTE ASSEt-18LEr
Page 193 Page 195

MCS-80/85 specifications

The Intel MCS-80/85 family, introduced in the late 1970s, is a seminal collection of microprocessors that played a pivotal role in the early days of computing. The MCS-80 series, initially targeting embedded systems and control applications, gained remarkable attention due to its innovative architecture and flexible programming capabilities.

The MCS-80 family is anchored by the 8080 microprocessor, which was one of the first fully integrated 8-bit microprocessors. Released in 1974, the 8080 operated at clock speeds ranging from 2 MHz to 3 MHz and featured a 16-bit address bus capable of addressing up to 64KB of memory. The processor’s instruction set included around 78 instructions, providing extensive capabilities for data manipulation, logic operations, and branching.

Complementing the 8080 was a suite of support chips, forming the MCS-80 platform. The most notable among them was the 8155, which integrated a static RAM, I/O ports, and a timer, tailored for ease of designing systems around the 8080. Other support chips included the 8085, which provided improvements with an integrated clock generator, making it compatible with more modern designs and applications.

The MCS-85 series, on the other hand, revolves around the 8085 microprocessor, which provided a more advanced architecture. The 8085 operated at clock speeds of up to 6 MHz and came with a 16-bit address bus, similar to its predecessor. However, it introduced more sophisticated features, including an enhanced instruction set and support for interrupt-driven programming. These enhancements made the 8085 especially appealing to developers working in real-time processing environments.

The MCS-80/85 family utilized NMOS technology, known for its lower power consumption and higher performance compared to previous technologies like TTL. The family’s architecture allowed for easy interfacing with a variety of peripherals, making it a favorite for educational institutions and hobbyists embarking on computer engineering projects.

With its robustness, versatility, and affordability, the Intel MCS-80/85 microprocessors laid the groundwork for many subsequent microcomputer systems and applications. The legacy of this powerful family continues to influence modern microprocessor design, emphasizing the importance of reliable architecture in a rapidly evolving technology landscape.
Top Page Image Contents