Intel cpb4612 manual Connectors, Jumper Options, Bios Configuration Overview

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80h

78 - 79h

70 - 77h

60 - 6Fh

50 - 5Fh

40 - 4Fh

30 - 3Fh

2E - 2Fh

22 - 2Dh

20 - 21h

0 - 1Fh

Diagnostic Port

Reserved

On-board Real-Time Clock

Keyboard and System Ports

Reserved

On-board Timer/Counters

Reserved

Super I/O Configuration

Reserved

On-board master Interrupt Controller

On-board Master DMA Controller

2.5Connectors

The cPB-4612 includes several connectors to interface to application-specific devices. Refer to the "Connectors" topic in Appendix B for complete connector descriptions and pin outs.

2.6Jumper Options

The cPB-4612 provides several jumper configuration options for features that cannot be provided through the BIOS Setup Utility. Location figures and descriptions are provided in Chapter 3, "Configuration."

2.7BIOS Configuration Overview

This topic presents an introduction to the cPB-4612’s BIOS.

The BIOS has many separately configurable features. These features are selected by running the built-in Setup utility. System configuration settings are saved in a portion of battery-backed RAM in the real-time clock device and are used by the BIOS to initialize the system at boot-up or reset. The configuration is protected by a checksum word for system integrity.

To access the Setup utility, press F2 during the system RAM check at boot-up. When Setup runs, an interactive configuration screen displays. Refer to the following "Setup Screen" illustration for an example.

Setup parameters are divided into different categories. The available categories are listed in a menu down the left side of the setup screen. The parameters within the highlighted (current) category are listed in the main (right) portion of the Setup screen. Context sensitive help can be displayed for each parameter by highlighting the parameter and pressing F1. A legend of keys is listed at the bottom of the Setup screen.

Use the up and down arrow keys to select a category from the menu. Use the up and down arrow keys to select a parameter in the main portion of the screen. Use the +/– or ↔keys to change the value of a parameter.

Solid arrows next to menu items in the main screen indicate submenus. To display a submenu, use the up and down arrow keys to highlight the submenu and then press Enter.

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Image 26 Contents
CPB4612 Return Shipment Information Diversified TECHNOLOGY, INCFor Your Safety Revision History Table of Contents IntroductionConfiguration Vii Datasheet Reference CPB4612 Configuration and Maintenance GuideTables FiguresDocument Organization Chapter IntroductionProduct Definition USB PMC Features Functional BlocksCompactPCI/PSB Architecture PCI-to-PCI Bridge ProcessorChipset Rear-Panel I/O Power Ramp CircuitryMemory and I/O Addressing VideoSerial I/O 11 10/100 Ethernet InterfaceIDE Hard Drive InterruptsTwo-Stage Watchdog Timer Counter/TimersReset 16 DMASystem Environmental Monitor LED IndicatorsUniversal Serial Bus USB SoftwareGetting Started System Requirements Bios Version Unpacking ConnectivityTBD Memory ConfigurationConfiguration Avg Peak 12V Avg PeakMemory Address Map Example Local DramCOM1 I/O ConfigurationPCI LPTJumper Options ConnectorsBios Configuration Overview Operating System Installation System Configuration SummaryPage Configuration +5V PMC I/O Jumper Cross-Reference Table FunctionPB1 2 J16-1 BKT-GND to GND Switch Descriptions1 PB1 Reset J16-1 Function4 J16-3 +5V PMC I/O 5 J16-4 Impi Disable3 J16-2 +12V to J5-pin D1 6 J17-1 Not Used10 J18 Ejector Switch 8 J17-3 Disable Onboard Video9 J17-4 Manufacture Test Mode Reset Soft Reset Sources Reset Types and SourcesHard Reset Sources Backend Power Down SourcesNMI Sources System Monitoring and Control Monitoring and Control Functions IpmbSensors Firmware UpdatesField Replaceable Unit FRU Information SMBus Address MapIDE Controller Primary IDE Channel Features of the IDE ControllerDisk Drive Support Secondary IDE ChannelWatchdog Timer Base Address Register 10h Watchdog Timer OverviewPCI Configuration Registers WDT Configuration Register 60h WDT Lock Register 68hPreload Value 1 BAR+00h Wdtenable Watchdog EnableMemory Mapped Registers Preload Value 2 BAR+04hReload Register BAR+0Ch Bit Description Reserved Watchdog Timer Interrupt ActiveGeneral Interrupt Status BAR+08h Description Reserved PreloadValue2Enabling the Watchdog Reset Using the Watchdog in an ApplicationWatchdog Reset WDT Unlocking and Programming SequenceSystem Bios Flash Utility Program Bios Upgrade and RecoveryBios Recovery Entering Setup… Boot MenuF2 Enter Setup Space Skip Memory ESC Boot Menu ROM Utilities ROM Utilities CPU System SummarySystem Summary Descriptions VGA RAMSystem Setup System Setup DescriptionsPage IDE Configuration Utility IDE ConfigIDE Config Descriptions Hard Disk Setup Primary Master Configuration SummaryHard Drive Setup Descriptions Boot Order Boot Order Descriptions Peripherals Port Control Descriptions Console Redirection Descriptions Disabled by defaultOnboard Peripheral Control Descriptions USB Mass Storage Config USB ConfigurationUSB Configuration Utility USB Devices DetectedUSB Mass Storage Config Descriptions USB Control DescriptionsMisc Config PCI Options DescriptionsAcpi / Power Settings PNP Options DescriptionsEvent Logging Descriptions Event Logging Configuration UtilityEvent Logging Security and ANTI-VIRUS Configuration Utility Security/VirusExit Menu ExitExit Description Plug and Play PnP PnP ISA Auto-configurationPCI Auto-configuration Resource AllocationAutomatic Detection of Video Adapters Legacy ISA ConfigurationSystem Management Bios Smbios Console RedirectionGfff Post Code LED Colors MSB-LSB Description RrrgOrrg GfrrPost Codes Trouble Shooting Hint Absolute Maximum Ratings SpecificationsDC Operating Characteristics Reliability Battery Backup CharacteristicsOperating Temperature MechanicalBoard Dimensions and Weight Page Connectors Connector Assignments FunctionConnector Locations J5 CpldBackplane Connectors Pin Locations J15 CompactPCI Bus Connector J15 CompactPCI Bus Connector Pin outJ11 CompactPCI Bus Connector J11 CompactPCI Bus Connector Pin outJ8 CompactPCI Connector J8 Connector Pin outJ2 Rear Panel I/O CompactPCI Connector J2 Rear Panel I/O Connector Pin outJ1 10/100 Ethernet J4 Universal Serial Bus 0 connectorJ4 Universal Serial Bus 0 Connector Pin out Pin# Function Pin# Function J6, J7, J9, J10 64bit/66Mhz PCI Mezzanine ConnectorsJ3 COM1 Serial Port PCIAD2 GND VCC3 VIOPCIAD3 PCIAD1PAR64 Page GND Pwrviopmc 10 J12 and J13 32bit/33Mhz PCI Mezzanine ConnectorsREQ# PCIAD9 VCC Pwrviopmc GND PCIAD0VCC3 GND BUSMODE4# 11 J14 IDE Connector Page Appendix C Thermal ConsiderationsTemperature Monitoring Thermal RequirementsPage Page Datasheet Reference Appendix DIntel 855GME Chipset CompactPCIEthernet Pentium M processor Fcbga PackagePMC Specification Super I/OPage Agency Approvals Industry Canada Canada Appendix F