Intel cpci borard with a intel pentuim M, cpb4612 manual Connector Locations, J5 Cpld

Page 79

B.1 Connector Locations

CPB-4612 Connectors Locations (Topside)

J4

- USB Port

 

 

J3

- COM1 Serial Port

 

 

J1 - 10/100 Ethernet

 

 

 

103

102

65

 

 

64

J2 - CompactPCI P5

A1

J5 - CPLD

Debug Header

U22 - SO-DIMM socket

66Mhz/64bit

2004MADE IN USA

P/N:651004612

1

cPB4612REV.1.0

128

1

39

 

 

38

1

 

1

3.3V Key

J6 – 66Mhz/64bit PMC site (JN1)

J7 – 66Mhz/64bit PMC site (JN2)

J9 – 66Mhz/64bit

PMC site 3.3V key

U26 - SO-DIMM socket

J14 - 2.5”

HDD IDE connector

(if available)

DIVERSIFIED TECHNOLOGCYOPYRIGHT

1

1

W/O

S/N

1

1

1

14

 

 

SET

4

 

 

 

 

3.3V Key

 

JUMPER

30

 

5V Key

20

 

 

ALSO

29

 

 

PMC site (JN3)

J10 – 66Mhz/64bit

PMC site (JN4)

A1

J8 - CompactPCI P3

J11 - CompactPCI P2

J12 - 33Mhz/32bit

PMC site (JN1)

A1

J13 - 33Mhz/32bit

PMC site (JN2)

DS1 - BLUE

 

 

 

CLR CMOS

VIDEO DIS

MANUMODE

 

 

 

 

 

22

12

 

J15 - CompactPCI P1

+12VRTM

PMC+5V

ZRCISP

 

 

 

 

 

 

 

BKT-GND

 

 

 

 

 

33 23

 

1

 

LED

 

 

 

 

 

 

 

 

 

 

 

 

 

11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

34

44

 

33Mhz/32bit PMC

RESET

 

 

 

 

 

 

 

 

 

4

3

[]B

 

 

site 5V key

LATCH

 

 

 

 

 

1

1

1

1

2

1

[A]

 

 

 

 

 

 

 

LSB

 

 

MSB

 

 

 

 

 

 

 

 

 

 

 

A1

 

 

 

 

 

 

 

 

33Mhz/32bit PMC

PB1 - Reset

 

 

 

U41 - BIOS

 

site 3.3V key

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DS2, DS3, DS4, DS5 - E1 - PS/2 Keyboard Header

Switch

 

J18 - Header for

 

POST Code LEDs

(for debug only)

69

 

 

CompactPCI Latch

 

 

 

 

 

 

 

 

 

 

 

BT1 - 3V Battery

Image 79 Contents
CPB4612 Diversified TECHNOLOGY, INC Return Shipment InformationFor Your Safety Revision History Introduction Table of ContentsConfiguration Vii CPB4612 Configuration and Maintenance Guide Datasheet ReferenceFigures TablesDocument Organization Introduction ChapterProduct Definition USB PMC Functional Blocks FeaturesCompactPCI/PSB Architecture Chipset ProcessorPCI-to-PCI Bridge Video Power Ramp CircuitryMemory and I/O Addressing Rear-Panel I/OInterrupts 11 10/100 Ethernet InterfaceIDE Hard Drive Serial I/O16 DMA Counter/TimersReset Two-Stage Watchdog TimerSoftware LED IndicatorsUniversal Serial Bus USB System Environmental MonitorGetting Started Connectivity Bios VersionUnpacking System Requirements12V Avg Peak Memory ConfigurationConfiguration Avg Peak TBDLocal Dram Memory Address Map ExampleLPT I/O ConfigurationPCI COM1Bios Configuration Overview ConnectorsJumper Options System Configuration Summary Operating System InstallationPage Configuration PB1 Jumper Cross-Reference Table Function+5V PMC I/O J16-1 Function Switch Descriptions1 PB1 Reset 2 J16-1 BKT-GND to GND6 J17-1 Not Used 5 J16-4 Impi Disable3 J16-2 +12V to J5-pin D1 4 J16-3 +5V PMC I/O9 J17-4 Manufacture Test Mode 8 J17-3 Disable Onboard Video10 J18 Ejector Switch Reset Backend Power Down Sources Reset Types and SourcesHard Reset Sources Soft Reset SourcesNMI Sources System Monitoring and Control Ipmb Monitoring and Control FunctionsSMBus Address Map Firmware UpdatesField Replaceable Unit FRU Information SensorsIDE Controller Secondary IDE Channel Features of the IDE ControllerDisk Drive Support Primary IDE ChannelWatchdog Timer PCI Configuration Registers Watchdog Timer OverviewBase Address Register 10h WDT Lock Register 68h WDT Configuration Register 60hPreload Value 2 BAR+04h Wdtenable Watchdog EnableMemory Mapped Registers Preload Value 1 BAR+00hDescription Reserved PreloadValue2 Bit Description Reserved Watchdog Timer Interrupt ActiveGeneral Interrupt Status BAR+08h Reload Register BAR+0ChWDT Unlocking and Programming Sequence Using the Watchdog in an ApplicationWatchdog Reset Enabling the Watchdog ResetSystem Bios Bios Recovery Bios Upgrade and RecoveryFlash Utility Program F2 Enter Setup Space Skip Memory ESC Boot Menu Boot MenuEntering Setup… ROM Utilities ROM Utilities VGA RAM System SummarySystem Summary Descriptions CPUSystem Setup Descriptions System SetupPage IDE Config Descriptions IDE ConfigIDE Configuration Utility Primary Master Configuration Summary Hard Disk SetupHard Drive Setup Descriptions Boot Order Boot Order Descriptions Peripherals Onboard Peripheral Control Descriptions Console Redirection Descriptions Disabled by defaultPort Control Descriptions USB Devices Detected USB ConfigurationUSB Configuration Utility USB Mass Storage ConfigUSB Control Descriptions USB Mass Storage Config DescriptionsPCI Options Descriptions Misc ConfigPNP Options Descriptions Acpi / Power SettingsEvent Logging Event Logging Configuration UtilityEvent Logging Descriptions Security/Virus Security and ANTI-VIRUS Configuration UtilityExit Description ExitExit Menu Resource Allocation PnP ISA Auto-configurationPCI Auto-configuration Plug and Play PnPConsole Redirection Legacy ISA ConfigurationSystem Management Bios Smbios Automatic Detection of Video AdaptersGfrr Post Code LED Colors MSB-LSB Description RrrgOrrg GfffPost Codes Trouble Shooting Hint DC Operating Characteristics SpecificationsAbsolute Maximum Ratings Mechanical Battery Backup Characteristics Operating Temperature ReliabilityBoard Dimensions and Weight Page Connector Assignments Function ConnectorsJ5 Cpld Connector LocationsBackplane Connectors Pin Locations J15 CompactPCI Bus Connector Pin out J15 CompactPCI Bus ConnectorJ11 CompactPCI Bus Connector Pin out J11 CompactPCI Bus ConnectorJ8 Connector Pin out J8 CompactPCI ConnectorJ2 Rear Panel I/O Connector Pin out J2 Rear Panel I/O CompactPCI ConnectorJ4 Universal Serial Bus 0 Connector Pin out Pin# Function J4 Universal Serial Bus 0 connectorJ1 10/100 Ethernet J3 COM1 Serial Port J6, J7, J9, J10 64bit/66Mhz PCI Mezzanine ConnectorsPin# Function PCIAD1 GND VCC3 VIOPCIAD3 PCIAD2PAR64 Page PCIAD0 10 J12 and J13 32bit/33Mhz PCI Mezzanine ConnectorsREQ# PCIAD9 VCC Pwrviopmc GND GND PwrviopmcVCC3 GND BUSMODE4# 11 J14 IDE Connector Page Thermal Considerations Appendix CThermal Requirements Temperature MonitoringPage Page Appendix D Datasheet ReferencePentium M processor Fcbga Package CompactPCIEthernet Intel 855GME ChipsetSuper I/O PMC SpecificationPage Agency Approvals Industry Canada Canada Appendix F