Intel 80960HA, 80960HD, 80960HT manual Pin Number Order Sheet 1

Page 29

																																80960HA/HD/HT
Table 11. 80960Hx PQ4 Pinout—										Pin Number Order (Sheet 1 of 2)

	PQ4	Signal Name								PQ4	Signal Name	PQ4	Signal Name																			PQ4	Signal Name
	Pin	Signal Name								Pin	Signal Name	Pin	Signal Name																			Pin	Signal Name
	Pin									Pin		Pin																				Pin

	1				VCC					31	VCC	61							D28													91	BSTALL
	2				VSS					32	VSS	62							D29													92			VCC
	3				VSS					33	VCC	63							D30													93			VSS
	4				VCC					34	D12	64							D31													94			VSS
	5									35	D13	65							VSS													95			VCC
	5				FAIL					35	D13	65							VSS													95			VCC
	6									36	D14	66							VCC													96
	6		ONCE							36	D14	66							VCC													96			D/C
	7				VSS					37	D15	67																				97
	7				VSS					37	D15	67		BTERM																		97			SUP
	8				VSS					38	VCC	68																				98			VSS
	8				VSS					38	VCC	68		READY																		98			VSS
	9				VCC					39	D16	69			HOLD																	99
	9				VCC					39	D16	69			HOLD																	99		LOCK
	10									40	D17	70							VSS													100	BREQ
	10			BOFF						40	D17	70							VSS													100	BREQ
	11				VCC					41	D18	71							VCC													101			VCC
	12				D0					42	D19	72		HOLDA																		102			VCC
	13				D1					43	VSS	73							VSS													103			VSS
	14				D2					44	VCC	74							VCC													104			A31
	15				D3					45	D20	75							VSS													105			A30
	16				VSS					46	VCC	76							VCC													106			A29
	17				VCC					47	VSS	77																				107			A28
	17				VCC					47	VSS	77						ADS														107			A28
	18				VSS					48	VSS	78																				108			VSS
	18				VSS					48	VSS	78						BE3														108			VSS
	19				VCC					49	VCC	79																				109			VCC
	19				VCC					49	VCC	79						BE2														109			VCC
	20				D4					50	D21	80							VSS													110			A27
	21				D5					51	D22	81							VCC													111			A26
	22				D6					52	D23	82																				112			A25
	22				D6					52	D23	82							BE1													112			A25

	23				D7					53	VSS	83																				113			A24
	23				D7					53	VSS	83						BE0														113			A24
	24				VSS					54	D24	84																				114			VSS
	24				VSS					54	D24	84			BLAST																	114			VSS
	25				VCC					55	D25	85																				115			VCC
	25				VCC					55	D25	85					DEN															115			VCC
	26				D8					56	D26	86							VSS													116			VSS
	27				D9					57	D27	87							VCC													117			VCC
	28				D10					58	VSS	88																				118			A23
	28				D10					58	VSS	88						W/R														118			A23
	29				D11					59	VCC	89																				119			A22
	29				D11					59	VCC	89				DT/R																119			A22
	30				VSS					60	VCC	90																				120			A21
	30				VSS					60	VCC	90				WAIT																120			A21

Datasheet

29

Image 29

Contents 80960HA/HD/HT 32-Bit High-Performance Superscalar Processor Datasheet Contents Contents Tables History DateDate Revision History 80960Hx AC Characteristics onThis page intentionally left blank Product Core Voltage Operating Frequency bus/core Hx Product DescriptionI960 Processor Family Key 80960Hx FeaturesOn-Chip Caches and Data RAM Remaining Fail Codes bit 7 = Bit When SetFail Codes For Bist bit 7 = Instruction Set Summary Comparison Branch Call/Return FaultHx Instruction Set Data Movement Arithmetic Logical Bit / Bit Field / BytePackage/Name Device Core Speed Bus Speed Order # MHz HA/HD/HT Package Types and SpeedsPin Description Nomenclature Symbol DescriptionPin Descriptions Name Type Description Hx Processor Family Pin Descriptions Sheet 1SUP Hx Processor Family Pin Descriptions Sheet 2Hold Hx Processor Family Pin Descriptions Sheet 3Clkin Hx Processor Family Pin Descriptions Sheet 480960Hx Mechanical Data Hx 168-Pin PGA Pinout- View from Top Pins Facing DownHx 168-Pin PGA Pinout- View from Bottom Pins Facing Up Pin Hx 168-Pin PGA Pinout- Signal Name Order Sheet 1Signal Name Hx 168-Pin PGA Pinout- Signal Name Order Sheet 2 Hx 168-Pin PGA Pinout- Pin Number Order Sheet 1 Hx 168-Pin PGA Pinout- Pin Number Order Sheet 2 I960 Hx PQ4 Pinout- Signal Name Order Sheet 1 Hx PQ4 Pinout- Signal Name Order Sheet 2 Pin Number Order Sheet 1 Pin Number Order Sheet 2 Equation 1. Calculation of Ambient Temperature TA Package Thermal SpecificationsMaximum TA at Various Airflows in C PGA Package Only Hx 168-Pin PGA Package Thermal CharacteristicsAirflow-ft/min m/sec 600Maximum TA at Various Airflows in C PQ4 Package Only Hx 208-Pin PQ4 Package Thermal CharacteristicsThermal Resistance C/Watt Airflow ft./min m/sec Parameter 400Stepping Register Information PowerQuad4 Plastic PackageHeat Sink Adhesives Device ID Version Numbers for Different Steppings Fields of 80960Hx Device IDHx Device ID Model Types Sockets Sources for AccessoriesOperating Conditions Absolute Maximum RatingsAbsolute Maximum Ratings Operating ConditionsVCC5 Pin Requirements Vdiff Recommended ConnectionsSym Parameter Min Max Units Vccpll Pin RequirementsSymbol Parameter Min Typ Max Units D.C.SpecificationsHx D.C. Characteristics Sheet 1 Sheet 2 Hx D.C. CharacteristicsHx A.C. Characteristics Sheet 1 A.C. SpecificationsSymbol Parameter Min Max Units Input Clock 1 Synchronous Outputs 1, 2, 3Relative Input Timings 1, 7 Hx A.C. Characteristics Sheet 2Relative Output Timings 1, 2, 3, 6 Hx Boundary Scan Test Signal Timings C. Characteristics Notes1 A.C. Test Conditions Clkin Waveform A.C. Timing WaveformsOutput Float Waveform Hold Acknowledge Timings TCK Waveform Output Delay and Output Float for TBSOV1 and TBSOF1 Rise and Fall Time Derating at 85 C and Minimum VCC ICC Active Thermal vs. Frequency Output Delay vs. Temperature Bus ∼ ∼ Reset Once Once ModeNon-Burst, Non-Pipelined Requests without Wait States Non-Burst, Non-Pipelined Read Request with Wait States Non-Burst, Non-Pipelined Write Request with Wait States BE30, Lock Blast DT/R DEN A314, SUP CT30, D/C Valid Lock Blast DT/R DEN A314, SUP Valid CT30, D/C Lock Blast DT/R DEN Wait Blast DT/R DEN Pchk Wait Blast BE30, Lock Burst, Pipelined Read Request with Wait States, 32-Bit Bus Burst, Pipelined Read Request with Wait States, 8-Bit Bus Burst, Pipelined Read Request with Wait States, 16-Bit Bus Using External Ready Terminating a Burst with Bterm Breq and Bstall Operation Clkin ADS Blast Ready Hold Functional Timing Lock Delays Holda Timing Byte Offset Word Offset 80960HA/HD/HT Summary of Aligned and Unaligned Transfers for 16-Bit Bus Summary of Aligned and Unaligned Transfers for 8-Bit Bus Idle Bus Operation Bus States Boundary Scan Cell Cell Type Comment 80960Hx Boundary Scan ChainHx Boundary Scan Chain Sheet 1 Lockbar Hx Boundary Scan Chain Sheet 2Nmibar Hx Boundary Scan Chain Sheet 3Pchk Hx Boundary Scan Chain Sheet 4Boundary Scan Description Language Example Adsbar Supbar E03, C02, D02, C01, E02, D01, F02, E01, F01 Bypass Input BC1 BEBAR3 XINTBAR7 80960HA/HD/HT Adsbar Adsbar Bebar Oncebar Pchkbar 100 Datasheet 101 102 Datasheet 103 104

80960HT, 80960HA, 80960HD specifications

The Intel 80960 family of microprocessors, introduced in the late 1980s, marked a significant evolution in the landscape of embedded systems and high-performance computing. The series included notable members such as the 80960HD, 80960HA, and 80960HT, each offering distinct features, technologies, and characteristics tailored for specific applications.

The Intel 80960HD was primarily designed for high-performance applications, such as real-time processing and advanced embedded control systems. With a robust architecture, the 80960HD featured a 32-bit data bus and a 32-bit address bus, enabling it to access a larger memory space and providing superior performance for computational tasks. It included a sophisticated instruction set that facilitated efficient execution, particularly for computationally intensive tasks. The internal architecture also supported pipelining, allowing multiple instructions to be processed simultaneously, thus enhancing throughput.

The 80960HA variant was tailored for high-availability applications, making it ideal for embedded systems where reliability is paramount. This model incorporated features that emphasized fault tolerance and stability, ensuring that systems relying on it could maintain operational integrity even in the event of component failures. The 80960HA showcased enhanced error detection and correction capabilities, which contributed to its reputation as a dependable choice for mission-critical applications.

On the other hand, the 80960HT was designed to meet the needs of high-performance telecommunications and networking applications. Recognized for its ability to handle multiple tasks concurrently, the 80960HT included advanced features such as built-in support for multitasking and real-time processing. This made it an excellent fit for applications that demanded rapid data handling and processing, such as routers and switches in networking environments. Its architecture allowed for efficient context switching, ensuring that multiple processes could execute seamlessly.

All three variants utilized the same family architecture, enabling easy integration and compatibility across different applications. They also supported various memory management techniques, such as virtual memory and caching, enhancing their performance in diverse operating conditions. With their combination of high processing power, reliability, and flexibility, the Intel 80960 family of microprocessors played a crucial role in advancing embedded computing technologies, paving the way for modern-day processors and systems. The 80960 series remains a noteworthy chapter in the evolution of microprocessor design, reflecting the growing demands of the computing landscape during its time.