Intel 80960HA 80960Hx Mechanical Data, Hx 168-Pin PGA Pinout- View from Top Pins Facing Down

Page 20

80960HA/HD/HT

3.280960Hx Mechanical Data

3.2.180960Hx PGA Pinout

Figure 2 depicts the complete 80960Hx PGA pinout as viewed from the top side of the component (i.e., pins facing down). Figure 3 shows the complete 80960Hx PGA pinout as viewed from the pin-side of the package (i.e., pins facing up). Table 9 lists the 80960Hx pin names with package location. See Section 4.3, “ Recommended Connections” on page 38 for specifications and recommended connections.

Figure 2. 80960Hx 168-Pin PGA Pinout— View from Top (Pins Facing Down)

 

S R Q P N M L K J H G F E D C B

A

 

1

D25

D24

D21

D19

D17

D16

D15

D13

D12

D11

D9

D8

D7

D5

D3

BOFF

VSS

1

 

 

2

D29

D27

D23

D20

D18

VCC

D14

VCC

VCC

D10

VCC

D6

D4

D2

D1

STEST

FAIL

2

 

 

3

READY

D31

D26

D22

VCC

VSS

VSS

VSS

VSS

VSS

VSS

VCC

D0

NC

ONCE

DP1

DP0

3

 

 

4

HOLDA BTERM D28

 

 

 

 

 

 

 

 

 

 

 

VSS

DP3

DP2

4

 

 

 

 

 

 

 

 

 

 

 

 

 

5

BE3

HOLD

D30

 

 

 

 

 

 

 

 

 

 

 

VCC5

TCK

VOLDET

5

 

 

 

 

 

 

 

 

 

 

 

 

 

6

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

VCC

TMS

TRST

6

 

BE2

ADS

 

 

 

 

 

 

 

 

 

 

 

 

7

 

VCC

VSS

 

 

 

A80960Hx

 

 

VSS

VCC

TDI

7

 

BE1

 

 

 

 

 

 

8

BLAST

VCC

VSS

 

 

 

 

 

VSS

PCHK

TDO

8

 

 

 

 

 

 

 

9

DEN

BE0

VSS

 

 

i M © 19xx

 

 

 

 

VSS

VCC

NC

9

 

 

 

 

 

 

 

 

10

W/R

VCC

VSS

 

 

 

 

 

 

VSS

VCCPLL

NC

10

11

DT/R

VCC

VSS

 

 

XXXXXXXX SS

 

 

 

 

VSS

VCC

CTO

11

 

 

 

 

 

 

 

 

12

WAIT

BSTALL

SUP

 

 

 

 

 

 

 

 

 

 

 

VSS

VCC

CT1

12

 

 

 

 

 

 

 

 

 

 

 

 

 

13

D/C

BREQ

A30

 

 

 

 

 

 

 

 

 

 

 

CLKIN

NC

CT2

13

 

 

 

 

 

 

 

 

 

 

 

 

 

14

LOCK

A29

A28

 

 

 

 

 

 

 

 

 

 

 

VCC

NC

CT3

14

 

 

 

 

 

 

 

 

 

 

 

 

 

15

A31

A26

A24

A20

VCC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VCC

NMI

XINT4

XINT0

XINT1

15

 

 

16

A27

A23

A21

A19

A16

VCC

A13

VCC

VCC

VCC

A7

VCC

A4

A2

XINT6

XINT3

RESET

16

 

 

17

A25

A22

A18

A17

A15

A14

A12

A11

A10

A9

A8

A6

A5

A3

XINT7

XINT5

XINT2

17

 

 

 

S R Q P N M L K J H G F E D C B

A

 

20

Datasheet

Image 20
Contents 80960HA/HD/HT 32-Bit High-Performance Superscalar Processor Datasheet Contents Contents Tables Date History80960Hx AC Characteristics on Date Revision HistoryThis page intentionally left blank Hx Product Description Product Core Voltage Operating Frequency bus/coreKey 80960Hx Features I960 Processor FamilyOn-Chip Caches and Data RAM Remaining Fail Codes bit 7 = Bit When SetFail Codes For Bist bit 7 = Comparison Branch Call/Return Fault Instruction Set SummaryHx Instruction Set Data Movement Arithmetic Logical Bit / Bit Field / ByteHA/HD/HT Package Types and Speeds Package/Name Device Core Speed Bus Speed Order # MHzPin Description Nomenclature Symbol DescriptionPin Descriptions Hx Processor Family Pin Descriptions Sheet 1 Name Type DescriptionHx Processor Family Pin Descriptions Sheet 2 SUPHx Processor Family Pin Descriptions Sheet 3 HoldHx Processor Family Pin Descriptions Sheet 4 ClkinHx 168-Pin PGA Pinout- View from Top Pins Facing Down 80960Hx Mechanical DataHx 168-Pin PGA Pinout- View from Bottom Pins Facing Up Pin Hx 168-Pin PGA Pinout- Signal Name Order Sheet 1Signal Name Hx 168-Pin PGA Pinout- Signal Name Order Sheet 2 Hx 168-Pin PGA Pinout- Pin Number Order Sheet 1 Hx 168-Pin PGA Pinout- Pin Number Order Sheet 2 I960 Hx PQ4 Pinout- Signal Name Order Sheet 1 Hx PQ4 Pinout- Signal Name Order Sheet 2 Pin Number Order Sheet 1 Pin Number Order Sheet 2 Package Thermal Specifications Equation 1. Calculation of Ambient Temperature TAHx 168-Pin PGA Package Thermal Characteristics Maximum TA at Various Airflows in C PGA Package OnlyAirflow-ft/min m/sec 600Hx 208-Pin PQ4 Package Thermal Characteristics Maximum TA at Various Airflows in C PQ4 Package OnlyThermal Resistance C/Watt Airflow ft./min m/sec Parameter 400Stepping Register Information PowerQuad4 Plastic PackageHeat Sink Adhesives Device ID Version Numbers for Different Steppings Fields of 80960Hx Device IDHx Device ID Model Types Sources for Accessories SocketsAbsolute Maximum Ratings Operating ConditionsAbsolute Maximum Ratings Operating ConditionsRecommended Connections VCC5 Pin Requirements VdiffVccpll Pin Requirements Sym Parameter Min Max UnitsSymbol Parameter Min Typ Max Units D.C.SpecificationsHx D.C. Characteristics Sheet 1 Hx D.C. Characteristics Sheet 2A.C. Specifications Hx A.C. Characteristics Sheet 1Symbol Parameter Min Max Units Input Clock 1 Synchronous Outputs 1, 2, 3Relative Input Timings 1, 7 Hx A.C. Characteristics Sheet 2Relative Output Timings 1, 2, 3, 6 C. Characteristics Notes Hx Boundary Scan Test Signal Timings1 A.C. Test Conditions A.C. Timing Waveforms Clkin WaveformOutput Float Waveform Hold Acknowledge Timings TCK Waveform Output Delay and Output Float for TBSOV1 and TBSOF1 Rise and Fall Time Derating at 85 C and Minimum VCC ICC Active Thermal vs. Frequency Output Delay vs. Temperature Bus ∼ ∼ Once Mode Reset OnceNon-Burst, Non-Pipelined Requests without Wait States Non-Burst, Non-Pipelined Read Request with Wait States Non-Burst, Non-Pipelined Write Request with Wait States BE30, Lock Blast DT/R DEN A314, SUP CT30, D/C Valid Lock Blast DT/R DEN A314, SUP Valid CT30, D/C Lock Blast DT/R DEN Wait Blast DT/R DEN Pchk Wait Blast BE30, Lock Burst, Pipelined Read Request with Wait States, 32-Bit Bus Burst, Pipelined Read Request with Wait States, 8-Bit Bus Burst, Pipelined Read Request with Wait States, 16-Bit Bus Using External Ready Terminating a Burst with Bterm Breq and Bstall Operation Clkin ADS Blast Ready Hold Functional Timing Lock Delays Holda Timing Byte Offset Word Offset 80960HA/HD/HT Summary of Aligned and Unaligned Transfers for 16-Bit Bus Summary of Aligned and Unaligned Transfers for 8-Bit Bus Idle Bus Operation Bus States Boundary Scan Cell Cell Type Comment 80960Hx Boundary Scan ChainHx Boundary Scan Chain Sheet 1 Hx Boundary Scan Chain Sheet 2 LockbarHx Boundary Scan Chain Sheet 3 NmibarHx Boundary Scan Chain Sheet 4 PchkBoundary Scan Description Language Example Adsbar Supbar E03, C02, D02, C01, E02, D01, F02, E01, F01 Bypass Input BC1 BEBAR3 XINTBAR7 80960HA/HD/HT Adsbar Adsbar Bebar Oncebar Pchkbar 100 Datasheet 101 102 Datasheet 103 104

80960HT, 80960HA, 80960HD specifications

The Intel 80960 family of microprocessors, introduced in the late 1980s, marked a significant evolution in the landscape of embedded systems and high-performance computing. The series included notable members such as the 80960HD, 80960HA, and 80960HT, each offering distinct features, technologies, and characteristics tailored for specific applications.

The Intel 80960HD was primarily designed for high-performance applications, such as real-time processing and advanced embedded control systems. With a robust architecture, the 80960HD featured a 32-bit data bus and a 32-bit address bus, enabling it to access a larger memory space and providing superior performance for computational tasks. It included a sophisticated instruction set that facilitated efficient execution, particularly for computationally intensive tasks. The internal architecture also supported pipelining, allowing multiple instructions to be processed simultaneously, thus enhancing throughput.

The 80960HA variant was tailored for high-availability applications, making it ideal for embedded systems where reliability is paramount. This model incorporated features that emphasized fault tolerance and stability, ensuring that systems relying on it could maintain operational integrity even in the event of component failures. The 80960HA showcased enhanced error detection and correction capabilities, which contributed to its reputation as a dependable choice for mission-critical applications.

On the other hand, the 80960HT was designed to meet the needs of high-performance telecommunications and networking applications. Recognized for its ability to handle multiple tasks concurrently, the 80960HT included advanced features such as built-in support for multitasking and real-time processing. This made it an excellent fit for applications that demanded rapid data handling and processing, such as routers and switches in networking environments. Its architecture allowed for efficient context switching, ensuring that multiple processes could execute seamlessly.

All three variants utilized the same family architecture, enabling easy integration and compatibility across different applications. They also supported various memory management techniques, such as virtual memory and caching, enhancing their performance in diverse operating conditions. With their combination of high processing power, reliability, and flexibility, the Intel 80960 family of microprocessors played a crucial role in advancing embedded computing technologies, paving the way for modern-day processors and systems. The 80960 series remains a noteworthy chapter in the evolution of microprocessor design, reflecting the growing demands of the computing landscape during its time.