Intel 82540EP Eeprom and Serial Flash Interface Signals, Power Management Signals, SMB Signals

Page 18

82540EP — Networking Silicon

3.2.6Power Management Signals

Symbol

Type

Name and Function

 

 

 

LAN_

 

Power Good (Power-on Reset). The Power Good signal is used to indicate that stable

PWR_

I

power is available for the 82540EP. When the signal is low, the 82540EP holds itself in

GOOD

 

reset state and floats all PCI signals.

 

 

 

 

 

Power Management Event. The 82540EP device drives this signal low when it

PME#

OD

receives a wake-up event and either the PME Enable bit in the Power Management

Control/Status Register or the Advanced Power Management Enable (APME) bit of the

 

 

 

 

Wake-up Control Register (WUC) is 1b.

 

 

 

AUX_PWR

I

Auxiliary Power. If the Auxiliary Power signal is high, then auxiliary power is available

and the 82540EP device should support the D3cold power state.

 

 

 

 

 

3.2.7Impedance Compensation Signals

Symbol

Type

Name and Function

 

 

 

 

 

N Device Impedance Compensation. This signal should be connected to an external

ZN_COMP

I/O

precision resistor (to VDD) that is indicative of the PCI trace load. This cell is used to

dynamically determine the drive strength required on the N-channel transistors in the

 

 

 

 

PCI I/O cells.

 

 

 

 

 

P Device Impedance Compensation. This signal should be connected to an external

ZP_COMP

I/O

precision resistor (to VSS) that is indicative of the PCI trace load. This cell is used to

dynamically determine the drive strength required on the P-channel transistors in the

 

 

 

 

PCI I/O cells.

 

 

 

3.2.8SMB Signals

Symbol

Type

Name and Function

 

 

 

SMBCLK

I/O

SMB Clock. The SMB Clock signal is an open drain signal for serial SMB interface.

 

 

 

SMBDATA

I/O

SMB Data. The SMB Data signal is an open drain signal for serial SMB interface.

 

 

 

SMBALRT#

O

SMB Alert. The SMB Alert signal is open drain for serial SMB interface.

 

 

 

3.3EEPROM and Serial FLASH Interface Signals

Symbol

Type

Name and Function

 

 

 

EE_DI

O

EEPROM Data Input. The EEPROM Data Input pin is used for output to the memory

device.

 

 

 

 

 

EE_DO

I

EEPROM Data Output. The EEPROM Data Output pin is used for input from the

memory device. The EE_DO includes an internal pull-up resistor.

 

 

 

 

 

EE_CS

O

EEPROM Chip Select. The EEPROM Chip Select signal is used to enable the device.

 

 

 

EE_SK

O

EEPROM Serial Clock. The EEPROM Shift Clock provides the clock rate for the

EEPROM interface, which is approximately 1 MHz.

 

 

 

 

 

12

Datasheet

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Image 18
Page 17 Page 19
Contents 82540EP Gigabit Ethernet Controller Revision AprilDatasheet Date Revision 82540EP Networking Silicon Contents 82540EP Networking Silicon Introduction RX MAC MdioTX MAC Acpi LEDDocument Scope Reference DocumentsProduct Code 82540EP Networking Silicon Features Benefits PCI FeaturesMAC Specific Features Application flexibility for LAN on MotherboardPHY Specific Features HostOffloadingManageability Features A server management processorAdditional Device Features Technology Features Symbol Type Name and Function Signal Type Definitions PCI Address, Data and Control Signals PCI Bus InterfaceIRDY# STS PARFRAME# STS TRDY# STSSystem Signals Arbitration SignalsInterrupt Signal Error Reporting SignalsImpedance Compensation Signals Eeprom and Serial Flash Interface SignalsPower Management Signals SMB SignalsMiscellaneous Signals LED SignalsOther Signals Analog XTAL1XTAL2 Digital Supplies Test Interface SignalsPower Supply Connections Analog SuppliesGND Control SignalsGround and No Connects CTRL15Absolute Maximum Ratingsa Absolute Maximum RatingsRecommended Operating Conditions Recommended Operating Conditions a Sheet 1Power Specifications D0a DC SpecificationsDC Characteristics Recommended Operating Conditions a Sheet 2Power Specifications D3cold Power Specifications Dr UninitializedPower Specifications Complete Subsystem O Characteristics Symbol Parameter Condition Min Typ Max= V SS AC Characteristics PCI Bus Interface Clock Parameters Timing Specifications PCI Bus InterfaceSymbol Parameter a PCI 66 MHz PCI 33 MHz Units Min Max TcycSymbol Parameter PCI 66MHz PCI 33 MHz Units Min Max PCI Bus Interface Timing ParametersVTH Symbol Parameter PCI 66 MHz UnitPCI Bus Interface Timing Measurement Conditions VTLPin Inch max Point 1kΩ 10 pFInch max Point 50 pF Link Interface Timing Eeprom InterfaceRise and Fall Times Yyww Device Identification82540EP Product Name Date CodeDatasheet Package InformationSymbol Parameter Value at specified airflow m/s Units Thermal SpecificationsThermal Characteristics Thermal resistance, junction-to-ambientPinout Information SMB Signals Power Management SignalsImpedance Compensation Signals Eeprom and Serial Flash Interface SignalsDigital Power Signals PHY SignalsTest Interface Signals Analog Power SignalsSignal Name Pin Grounds and No Connect SignalsSignal Names in Pin Order Sheet 1 Lanpwrgood SmbclkM66EN REQ# CBE3# Signal Names in Pin Order Sheet 2RST# SMBALRT# CLKRUN# Smbdata GNDSignal Names in Pin Order Sheet 3 IRDY# FRAME# CBE2# GNDCLK VIO TRDY# Zpcomp Signal Names in Pin Order Sheet 4 STOP# INTA# DEVSEL# ZncompPAR PERR# GNT# Signal Names in Pin Order Sheet 5 CBE1#CBE0# PCIAD5 GND PCIAD1 Clkview FLCE# Eesk PCIAD8 PCIAD6 PCIAD3 PCIAD2 Eecs GND Flso Eedi Signal Names in Pin Order Sheet 6PCIAD9 PCIAD7 PCIAD4 Vddo P12Visual Pin Reference C D E F G H J K L M N P
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