Compaq M-LVDS manual 2. EVM Layer Stack Up, Mils

Page 30

PCB Construction

Table 3−2 shows the layer stack up of the EVM with the defined trace widths for the controlled impedance etch runs using microstrip construction.

Table 3−2. EVM Layer Stack Up

Material

 

 

 

 

 

Differential Model

Single-Ended

Model

Layer

Layer

Thickness

Copper

 

 

 

 

 

 

 

Line

 

 

 

Line

 

 

Type:

 

Spacing

Impedance

Impedance

No.

Type

(mils)

Weight

Width

 

Width

FR 406

 

(mils)

()

 

()

 

 

 

 

(mils)

 

(mils)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

Signal

0.0006

0.5 oz (start)

0.027

 

0.230

100

0.0420

 

50

 

 

 

 

 

 

 

 

 

 

 

 

PREPREG

 

 

0.025

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

Plane

0.0012

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CORE

 

 

0.004

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

Plane

0.0012

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PREPREG

 

 

0.025

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

Signal

0.0006

0.5 oz (start)

0.027

 

0.230

100

0.0420

 

50

 

 

 

 

 

 

 

 

 

 

 

 

3-8

Bill of Materials, Board Layout, and PCB Construction

Image 30
Contents User’s Guide Important Notice EVM Important Notice EVM Warnings and Restrictions How to Use This Manual PrefacePage Contents Figures TablesM-LVDS Evaluation Module TopicOverview −1. M-LVDS Devices Supported by the EVMLvds Standard TIA/EIA−899 Lvds EVM Kit Contents Configurations Point-to-PointMultidrop MultipointEVM Operation With Separate Power Supplies −7. Two-Node Multipoint CircuitPS1 PS2 PS3 Recommended EquipmentTest Setup Typical Cable Test Configurations −1. EVM Configuration OptionsPoint-to-Point Simplex Transmission Point-to-Point Parallel Terminated Simplex Transmission Two-Node Multipoint Transmission−3. Two-Node Multipoint Transmission Test Results −4. Point-to-Point Parallel Simplex Typical Eye Pattern DataDriver Input Receiver #1 Output Receiver #2 Bill of Materials, Board Layout, and PCB Construction Bill of Materials −1. M-LVDS EVM Bill of Materials−1. Assembly Drawing Board LayoutÏïïïïïïïïïïïïï Ï Ìììììììììììììì Ì −5. Bottom Layer PCB Construction + 2 Z 374e * 2.9s hMicrostripstripline −2. EVM Layer Stack Up MilsSchematic This Appendix contains the EVM schematicVCC