Compaq M-LVDS manual 5. Bottom Layer

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Board Layout

The bottom layer of the EVM contains bulk and decoupling capacitors to be placed close to the power and ground pins on the device.

Figure 3−5. Bottom Layer

		C9	C10
		C8	C7
VCC01					VCC
C5	C4	C2	C1	C6	C3
GND01					GND

Bill of Materials, Board Layout, and PCB Construction

3-5

Image 27

Contents User’s Guide Important Notice EVM Important Notice EVM Warnings and Restrictions Preface How to Use This ManualPage Contents Tables FiguresTopic M-LVDS Evaluation Module−1. M-LVDS Devices Supported by the EVM OverviewLvds Standard TIA/EIA−899 Lvds EVM Kit Contents Point-to-Point ConfigurationsMultipoint Multidrop−7. Two-Node Multipoint Circuit EVM Operation With Separate Power SuppliesRecommended Equipment PS1 PS2 PS3Test Setup Typical Cable Test Configurations −1. EVM Configuration OptionsPoint-to-Point Simplex Transmission Two-Node Multipoint Transmission Point-to-Point Parallel Terminated Simplex Transmission−3. Two-Node Multipoint Transmission −4. Point-to-Point Parallel Simplex Typical Eye Pattern Data Test ResultsDriver Input Receiver #1 Output Receiver #2 Bill of Materials, Board Layout, and PCB Construction −1. M-LVDS EVM Bill of Materials Bill of MaterialsBoard Layout −1. Assembly DrawingÏïïïïïïïïïïïïï Ï Ìììììììììììììì Ì −5. Bottom Layer + 2 Z 374e * 2.9s h PCB ConstructionMicrostripstripline Mils −2. EVM Layer Stack UpThis Appendix contains the EVM schematic SchematicVCC