Compaq manual M-LVDS Evaluation Module, Topic

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Chapter 1

The M-LVDS Evaluation Module

This document describes the multipoint low-voltage differential-signaling (M-LVDS) evaluation module (EVM) used to aid designers in development and analysis of this new signaling technology. The Texas Instruments SN65MLVD200A, SN65MLVD201, SN65MLVD202A, SN65MLVD203, SN65MLVD204A, SN65MLVD205A, SN65MLVD206, SN65MLVD207 series are low-voltage differential line drivers and receivers complying with the M-LVDS standard (TIA/EIA−899). The EVM kit contains the assembled printed-circuit board and all of the released devices referred to in Table 1−1. Using the EVM to evaluate these devices should provide insight into the design of low-voltage differential circuits. The EVM board allows the designer to connect an input to one or both of the drivers and configure a point-to-point, multidrop, or multipoint data bus.

The EVM can be used to evaluate device parameters while acting as a guide for high-frequency board layout. The board allows for the connection of a 100-controlled impedance cable of varying lengths. This provides the designer with a tool for evaluation and successful design of an end product.

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1.1

Overview

. . 1-2

1.2

M-LVDS Standard TIA/EIA−899

. . 1-3

1.3

M-LVDS EVM Kit Contents

. . 1-4

1.4

Configurations

. . 1-5

1.5

Recommended Equipment

. . 1-8

 

 

 

1-1

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Contents User’s Guide Important Notice EVM Important Notice EVM Warnings and Restrictions Preface How to Use This ManualPage Contents Tables FiguresTopic M-LVDS Evaluation Module−1. M-LVDS Devices Supported by the EVM OverviewLvds Standard TIA/EIA−899 Lvds EVM Kit Contents Point-to-Point ConfigurationsMultipoint Multidrop−7. Two-Node Multipoint Circuit EVM Operation With Separate Power SuppliesRecommended Equipment PS1 PS2 PS3Test Setup Typical Cable Test Configurations −1. EVM Configuration OptionsPoint-to-Point Simplex Transmission Two-Node Multipoint Transmission Point-to-Point Parallel Terminated Simplex Transmission−3. Two-Node Multipoint Transmission −4. Point-to-Point Parallel Simplex Typical Eye Pattern Data Test ResultsDriver Input Receiver #1 Output Receiver #2 Bill of Materials, Board Layout, and PCB Construction −1. M-LVDS EVM Bill of Materials Bill of MaterialsBoard Layout −1. Assembly DrawingÏïïïïïïïïïïïïï Ï Ìììììììììììììì Ì −5. Bottom Layer + 2 Z 374e * 2.9s h PCB ConstructionMicrostripstripline Mils −2. EVM Layer Stack UpThis Appendix contains the EVM schematic SchematicVCC