Contents
Personal Computer Model Z-350
Timer
BACKUP, INIT, COPY, DEBUG, Killall
Memory
Video
Refer to the page TIN Circuit Diagram
Slot Slot2
LSI, 1C Cmosic
SFDI/F
Preset
Symbol
Sdisp
Change Disp
Basic Area RAM
Base
System
User
MZ-1D07
MZ3500 System configuration of Model
Software Memory Configuration
MS1 = D MSO = 0 L
Timing of Reset Signal
SD1 System Loading & CP/M
ROM-IPL
Bank Select
Ffff
MAO
SD3 RAM based Basic
Operational description
Bank
ROM
Block diagram Relation between MMR main memory
Main Memory Mapper
Main CPU and I/O port
This paragraph discusses main CPU I/O
Table below describes address map
0001
Main CPU \m
MZ3500
Sub CPU and I/O port
Memory mapper MMRSP6102R-001 Block diagram
To Reset
Address BUS
Coab
MZ3500 Memory mapper MMR SP6102R-001 signal description
RAS ROW Address Select Line Address Select Signal
Srdy
Pin No
IN/OUT
RO1B
RO2B
A7 A6 A5A4A3A2AlAO H E X Uhus 1 O
1 1 1 1 0 KI1 Dl Do 17 D6 D5
D2 Dl 1 1 1 1 1 0 FE do D4 D3
1 1 1 1 1 1 FF 14 I N D3
MZ3500 Memory ROMIPL, RAMCOM, S-RAM select circuit
Specification
CRT
Summary of video display specification
Asci
Dot pitch
Blue
Dot color designated by
Graphic dot
CH AT
KA7
CH AI +,! AT A r + + G
#1 FFF
Ascii CG
Video RAM Structure of Vram
Structure of character Vram When read/write from GDC
#07FFA
#0000
Read/write by Z-80 via the GDC 640 x 200 dots display mode
8bit
16K
FV = 60 Hz
640 x 400 bits display mode FH = 20.92 kHz FV = 47.3 Hz
Setup of GCD master/slave
Master/slave setup by combination
O signal switching
Crtc block diagram
Graphic V-RAM Address
Page
Master slice LSI CSP-1 SP6102C 002 signal description
CSP-1 Block Diagram
» CK
CSH
LSI CSP-2 SP6012C-003 Signal Description
HSY2 2BLK2
CSP 2 Block Diagram
3r00
DSP2 OUT
CAS OUT
GDC Graphic display controller UPD7220 signal description
AD15ILC2
NK-CLC
AT~BTI
CSR-1MAGE
CG Address Select Circuit
Structure
Vsync
Circuit description
Character Vram select circuit
Blsc
Set GDC command code
Read/write from the Z-80 to V-RAM
Return when all parameters were sent
Csrw C 49H -COMMAND Code
Write C 23H Command Code Vecte C 6CH Command Code
Fifo Empty?
60H
Explanation
VECTE. Dot address is structured on the screen
Following manner Dot display program example-1
I T E C 23H
P4 88H P5 HH
Kind of line solid line
Floppy disk
Outline
TJ ILJ n
VnVn n nV nnn7
Ci D ci Ici
Data
MZ3500 MFD interface block diagram
FDC UPD765
22 «- o Window
UPD765 signal description
Trigger motor on of the timer 555 Selects FDD
MZ350C
Port used in the MFD interface is as follows
MFM recording method
Controls during read, write, seek, and re- calibrate
Media detection
3500 Precompensate Circuit
Control during seek and recalibration
VFO circuit
Purpose String of data Pulses from the FDD Data window
VFO circuit configuration
Filter Phase Detector Amplifier Window
MFM Mode
BQA
FM mode timing chart
\\\\
Side =
Aload
3DSC
76 iy 7 EH 77 / FFH
\128
Track 10 sector
Indicates the byte position From the top of directory
Ii Patat
B144 6145 B146 B147 39 B148 B149 B150 B151
39 B74 B75
1015
General specification
Data transmission format
MZS500
Example 7-bits, even parity, 1 stop bit
AC controls
Start
OFF
MZ3500 Data output control
KTS
8251 AC
3SOO
RXEN,UTR , T X E N
200
9 6.3
256
128
Wl -»
«--N
8253
8253 OUT
Printer interfacing circuit
AA3
DAT
DS7
General description of the parallel interface
Output
Data transfer timing
I/O port map
Clock circuit Schematic
Read Hold
Write Hold SET
DIN
MZ3500 PD1990AC Block diagram
LSB MSB
Mmmil
» GETE1 J
3500
S I C
GP I/O
SFD 1/F
SW2 SW1 On on CE332P OFF on MZ1P02 On OFF IO2824 OFF OFF
Dipswa
SEC
FD2
\f Canbe in either state
Block diagram
Functions
Description of each block
Switching regulator
+5V
Alarm generation circuit
Timing chart
Specification of keyboard control
At rrn
Key
Key search timing
2s 2s22 21
Key
Strobe
132.5
22.5/-s
Protocol Key to sub CPU
Keyboard controller basic flow
Keyboard controller signal description
XTAL1 XTAL2 Reset INT
PIN
ALE DBO DB7 GND
On OFF
Procedure
Sub-CPU side
Shared RAM
CRT inter face test
Abnormal
S C I I 00-FF
Abnormal test ending
1 5 c * O DR O.7
Ready O.H
ROM-IPL Main CPU Checker Flow Chart 1/2
Main CPU Checker Flow Chart M?
100
101
M7*500
Keyboard controller ROM test
Keyboard test
IPL Flow Chart
Jump \ Boot Address System
SEEK, Read Error
Error
Load Iocs SEEK& Read
SUB CPU IPL Flow Chart
105
LJ LJ LJ LJ LJ LJ LJ
R R R R F1
LU LU U LJ LlJ LJ U U
U J l J J L i J L L j l J J L l J L L l
IwC
AIO
RoB
MZ-35OO Parts Guide LI
No Parts Code
LED PWB
S C R I P T I O N
IE--or Ooss-zw
MZ-3500
Parts Code
N T K
Qcnw
Connector
S C R I P T I O N
MZ-3500
NO. Parts Code
Parts Code
A a N a D
VH S N 7 4 0 6 N
NEW
Part S C R I P T I O N
Mark Rank
Coos
J9, MZ1K02,1K03,1K04,1K05 Key unit
M2-3500
SOC
LSI RAM
LA a
NO. Parts Code
D e
Tin
Parts Code
N a a
MZ-3500
Sharp Corporation